AD7790B Просмотр технического описания (PDF) - Analog Devices

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AD7790B

Low Power, 16-Bit Buffered Sigma-Delta ADC

Analog Devices 

Data Sheet

AD7790

STATUS REGISTER (RS1, RS0 = 0, 0; POWER-ON/RESET = 0x88)

The status register is an 8-bit read-only register. To access the ADC status register, the user must write to the communications register,

select the next operation to be a read, and load bits RS1 and RS0 with 0. Table 8 outlines the bit designations for the status register. SR0

through SR7 indicate the bit locations, SR denoting the bits are in the status register. SR7 denotes the first bit of the data stream. The

number in brackets indicates the power-on/reset default status of that bit.

SR7

SR6

SR5

SR4

SR3

SR2

SR1

SR0

RDY(1)

ERR(0)

0(0)

0(0)

1(1)

WL(0)

CH1(0)

CH0(0)

Table 8. Status Register Bit Designations

Bit Location Bit Name

Description

SR7

RDY

Ready bit for ADC. Cleared when data is written to the ADC data register. The RDY bit is set automatically

after the ADC data register has been read or a period of time before the data register is updated with a

new conversion result to indicate to the user not to read the conversion data. It is also set when the part

is placed in powe-down mode. The end of a conversion is indicated by the DOUT/RDY pin also. This pin

can be used as an alternative to the status register for monitoring the ADC for conversion data.

SR6

ERR

ADC Error Bit. This bit is written to at the same time as the RDY bit. Set to indicate that the result written

to the ADC data register has been clamped to all 0s or all 1s. Error sources include overrange, under-

range. Cleared by a write operation to start a conversion.

SR5

0

This bit is automatically cleared.

SR4

0

This bit is automatically cleared.

SR3

1

This bit is automatically set.

SR2

0

This bit is automatically cleared if the device is an AD7790. It can be used to distinguish between the

AD7790 and AD7791, in which the bit is set.

SR1–SR0

CH1–CH0

These bits indicate which channel is being converted by the ADC.

MODE REGISTER (RS1, RS0 = 0, 1; POWER-ON/RESET = 0x02)

The mode register is an 8-bit register from which data can be read or to which data can be written. This register is used to configure the

ADC for range, enable or disable the buffer, or place the device into power-down mode. Table 9 outlines the bit designations for the mode

register. MR0 through MR7 indicate the bit locations, MR denoting the bits are in the mode register. MR7 denotes the first bit of the data

stream. The number in brackets indicates the power-on/reset default status of that bit. Any write to the setup register resets the modulator

and filter and sets the RDY bit.

MR7

MD1(0)

MR6

MD0(0)

MR5

G1(0)

MR4

G0(0)

MR3

BO(0)

MR2

0(0)

MR1

BUF(1)

MR0

0(0)

Table 9. Mode Register Bit Designations

Bit Location Bit Name

Description

MR7–MR6

MD1–MD0

Mode Select Bits. These bits select between continuous conversion mode, single conversion mode, and

standby mode. In continuous conversion mode, the ADC continuously performs conversions and places

the result in the data register. RDY goes low when a conversion is complete. The user can read these

conversions by placing the device in continuous read mode whereby the conversions are automatically

placed on the DOUT line when SCLK pulses are applied. Alternatively, the user can instruct the ADC to

output the conversion by writing to the communications register. After power-on, the first conversion is

available after a period 2/ fADC while subsequent conversions are available at a frequency of fADC. In single

conversion mode, the ADC is placed in power-down mode when conversions are not being performed.

When single conversion mode is selected, the ADC powers up and performs a single conversion, which

occurs after a period 2/fADC. The conversion result in placed in the data register, RDY goes low, and the

ADC returns to power-down mode. The conversion remains in the data register and RDY remains active

(low) until the data is read or another conversion is performed. See Table 10.

MR5–MR4

G1–G0

Range Bits. The AD7790 can be operated with four analog input ranges (see Table 11).

MR3

BO

Burnout Current Enable Bit. When this bit is set to 1 by the user, the 100 nA current sources in the signal

path are enabled. When BO = 0, the burnout currents are disabled. The burnout currents can be enabled

only when the buffer is active.

Rev. A | Page 11 of 20

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