EVAL-AD7652CB Просмотр технического описания (PDF) - Analog Devices
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EVAL-AD7652CB Datasheet PDF : 28 Pages
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ABSOLUTE MAXIMUM RATINGS
Table 5. AD7652 Stress Ratings1
IN2, TEMP2, REF, REFBUFIN,
AVDD + 0.3 V to
INGND, REFGND to AGND
AGND – 0.3 V
Ground Voltage Differences
AGND, DGND, OGND
±0.3 V
Supply Voltages
AVDD, DVDD, OVDD
–0.3 V to +7 V
AVDD to DVDD, AVDD to OVDD ±7 V
DVDD to OVDD
–0.3 V to +7 V
Digital Inputs
–0.3 V to DVDD + 0.3 V
PDREF, PDBUF3
±20 mA
Internal Power Dissipation4
700 mW
Internal Power Dissipation5
2.5 W
Junction Temperature
150°C
Storage Temperature Range
–65°C to +150°C
Lead Temperature Range
300°C
(Soldering 10 sec)
1Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed
in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect
device reliability.
2See Analog Input section.
3See Voltage Reference Input Section.
4Specification is for the device in free air:
48-Lead LQFP; θJA = 91°C/W, θJC = 30°C/W
5Specification is for the device in free air:
48-Lead LFCSP; θJA = 26°C/W.
AD7652
1.6mA IOL
TO OUTPUT
PIN
CL
60pF*
500µA IOH
1.4V
* IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM.
02964-0-006
Figure 2. Load Circuit for Digital Interface Timing,
SDOUT, SYNC, SCLK Outputs CL = 10 pF
0.8V
tDELAY
2V
0.8V
2V
tDELAY
2V
0.8V
02965-0-007
Figure 3. Voltage Reference Levels for Timing
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 7 of 28
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