AD7303 Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
AD7303 Datasheet PDF : 16 Pages
| |||
AD7303
DB15 (MSB)
DB0 (LSB)
INT/EXT X LDAC PDB PBA A/B CR1 CR0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
|––––––––––––––––––––––––– Control Bits –––––––––––––––––––––––––|––––––––––––––––––––––––– Data Bits –––––––––––––––––––––––––|
Figure 24. Input Shift Register Contents
Bit Location
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7–DB0
Mnemonic
INT/EXT
X
LDAC
PDB
PDA
A/B
CR1
CR0
Data
CONTROL BITS
LDAC
A/B
0
X
0
0
0
1
0
0
0
1
0
0
0
1
1
0
1
1
INT/EXT
0
1
PDA
0
0
1
1
PDB
0
1
0
1
Description
Selects between internal and external reference.
Uncommitted bit.
Load DAC bit for synchronous update of DAC outputs.
Power-down DAC B.
Power-down DAC A.
Address bit to select either DAC A or DAC B.
Control Bit 1 used in conjunction with CR0 to implement the various data loading functions.
Control Bit 0 used in conjunction with CR1 to implement the various data loading functions.
These bits contain the data used to update the output of the DACs. DB7 is the MSB and
DB0 the LSB of the 8-bit data word.
CR1
CR0
Function Implemented
0
0
Both DAC registers loaded from shift register.
0
1
Update DAC A input register from shift register.
0
1
Update DAC B input register from shift register.
1
0
Update DAC A DAC register from input register.
1
0
Update DAC B DAC register from input register.
1
1
Update DAC A DAC register from shift register.
1
1
Update DAC B DAC register from shift register.
X
X
Load DAC A input register from shift register and update
both DAC A and DAC B DAC registers.
X
X
Load DAC B input register from shift register and update
both DAC A and DAC B DAC registers outputs.
Function
Internal VDD/2 reference selected.
External reference selected; this external reference is applied at the REF pin and ranges from
1 V to VDD/2.
Function
Both DACs active.
DAC A active and DAC B in power-down mode.
DAC A in power-down mode and DAC B active.
Both DACs powered down.
–10–
REV. 0
Share Link: 