EVAL-CEDZ Просмотр технического описания (PDF) - Analog Devices
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EVAL-CEDZ Datasheet PDF : 32 Pages
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AD7264
TYPICAL CONNECTION DIAGRAMS
Figure 26 and Figure 27 are typical connection diagrams for the
AD7264. In these configurations, the AGND pin is connected
to the analog ground plane of the system, and the DGND pin is
connected to the digital ground plane of the system. The analog
inputs on the AD7264 are true differential and have an input
impedance in excess of 1 GΩ; thus, no driving op amps are
required. The AD7264 can operate with either an internal or an
external reference. In Figure 26, the AD7264 is configured to
operate in control register mode; thus, G0 to G3, PD1, and PD2
can be connected to ground (low logic state). Figure 27 has the
gain pins configured for a gain of 2 setup; thus, the device is in
+5V
ANALOG
SUPPLY
10µF1 100nF
100nF
100nF
100nF
100nF
pin driven mode. Both circuit configurations illustrate the use
of the internal 2.5 V reference.
The CA_CBVCC and CC_CDVCC pins can be connected to either a
3 V or 5 V supply voltage. The AVCC pin must be connected to
a 5 V supply. All supplies should be decoupled with a 100 nF
capacitor at the device pin, and some supply sources may
require a 10 μF capacitor where the source is supplied to the
circuit board. The VDRIVE pin is connected to the supply voltage
of the microprocessor. The voltage applied to the VDRIVE input
controls the voltage of the serial interface. VDRIVE can be set to
3 V or 5 V.
100nF
100nF
10µF1
COMPARATOR
SUPPLY 3V TO 5V2
17 44 5 6 8 19 42 28 2 7 11 20 41 12 1 33
100nF
3.125V
VA– AND VA+
CONNECT
DIRECTLY
TO SENSOR
OUTPUTS
2.500V
1.875V
3.125V
2.500V
1.875V
GAIN 2
GAIN 2
THIS REFERENCE SIGNAL
MUST BE BUFFERED
BEFORE IT CAN BE
USED ELSEWHERE IN
THE CIRCUIT
3.125V
VB– AND VB+
CONNECT
DIRECTLY
TO SENSOR
OUTPUTS
2.500V
1.875V
3.125V
2.500V
1.875V
GAIN 2
GAIN 2
3 VA–
4 VA+
43
1µF
VREFA
18
1µF
VREFB
9 VB+
10 VB–
13 14 15 16
AD7264
VDRIVE 27
40
G0
G1 39
G2 38
G3 37
VDRIVE
100nF
3V OR 5V
SUPPLY
10µF1
34
SCLK
35
CS
DOUTA 32
DOUTB 31
REFSEL 24
CAL 36
SERIAL
INTERFACE
MICROPROCESSOR/
MICROCONTROLLER
VDRIVE
23
PD0/DIN
PD1 22
PD2 21
45 46 47 48 25 26 29 30
FAST PROPAGATION DELAY
LOW POWER
COMPARATOR INPUTS COMPARATOR INPUTS
1THESE CAPACITORS ARE PLACED AT THE SUPPLY SOURCE AND MAY NOT BE REQUIRED IN ALL SYSTEMS.
2THIS SUPPLY CAN BE CONNECTED TO THE ANALOG 5V SUPPLY IF REQUIRED.
Figure 26. Typical Connection Diagram for the AD7264 in Control Register Mode (All Gain Pins Tied to Ground) Configured for a PGA Gain of 2
Rev. A | Page 17 of 32
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