AD7147 Просмотр технического описания (PDF) - Analog Devices
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AD7147 Datasheet PDF : 71 Pages
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Data Sheet
AD7147
I2C TIMING SPECIFICATIONS (AD7147-1)
TA = −40°C to +85°C, sample tested at 25°C to ensure compliance. VDRIVE = 1.65 V to 3.6 V, and VCC = 2.6 V to 3.6 V, unless otherwise
noted. All input signals timed from a voltage level of 1.6 V.
Table 5. I2C Timing Specifications1
Parameter
Limit
fSCLK
400
t1
0.6
t2
1.3
t3
0.6
t4
100
t5
300
t6
0.6
t7
0.6
t8
1.3
tR
300
tF
300
Unit
kHz max
μs min
μs min
μs min
ns min
ns min
μs min
μs min
μs min
ns max
ns max
Description
Start condition hold time, tHD; STA
Clock low period, tLOW
Clock high period, tHIGH
Data setup time, tSU; DAT
Data hold time, tHD; DAT
Stop condition setup time, tSU; STO
Start condition setup time, tSU; STA
Bus-free time between stop and start conditions, tBUF
Clock/data rise time
Clock/data fall time
1 Guaranteed by design, not production tested.
I2C Timing Diagram
SCLK
SDA
t8
t2
tR
t1
t5
STOP START
tF
t3
t4
t1
t7
START
Figure 3. I2C Detailed Timing Diagram
t6
STOP
200µA
IOL
TO OUTPUT
PIN CL
50pF
1.6V
200µA
IOH
Figure 4. Load Circuit for Digital Output Timing Specifications
Rev. E | Page 7 of 70
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