AD6654 Просмотр технического описания (PDF) - Analog Devices
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AD6654 Datasheet PDF : 88 Pages
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AD6654
ELECTRICAL CHARACTERISTICS
AVDD = 5.0 V, DRVDD = 3.3 V, VDDCORE = 1.8 V, VDDIO = 3.3 V, maximum rated sample rate, differential input, unless
otherwise noted.
Table 6.
Parameter (Conditions)
LOGIC INPUTS (NOT 5 V TOLERANT)
Logic Compatibility
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Logic 1 Current (Inputs With Pull-Down)
Logic 0 Current (Inputs With Pull-Up)
Input Capacitance
LOGIC OUTPUTS
Logic Compatibility
Logic 1 Voltage (IOH = 0.25 mA)
Logic 0 Voltage (IOL = 0.25 mA)
SUPPLY CURRENTS
WCDMA (92.16 MSPS) EXAMPLE1
IAVDD
IDRVDD
IVDD
IVDDIO
CDMA2000 (92.16 MSPS) EXAMPLE1
IAVDD
IDRVDD
IVDD
IVDDIO
TDS-CDMA (76.8 MSPS) EXAMPLE1, 2
IAVDD
IDRVDD
IVDD
IVDDIO
TOTAL POWER DISSIPATION
WCDMA (92.16 MSPS)1
CDMA2000 (92.16 MSPS)1
TDS-CDMA (76.8 MSPS)1, 2
Temp
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
Full
Test Level
IV
IV
IV
IV
IV
IV
IV
V
IV
IV
IV
Min Typ
3.3 V CMOS
2.0
−0.3
1
1
4
3.3 V CMOS
2.4
VDDIO − 0.2
0.2
Max Unit
3.6
V
+0.8 V
10
µA
10
µA
pF
V
0.4
V
25°C
V
275
mA
25°C
V
32
mA
25°C
V
460
mA
25°C
V
60
mA
25°C
V
275
mA
25°C
V
32
mA
25°C
V
435
mA
25°C
V
25
mA
25°C
V
275
mA
25°C
V
32
mA
25°C
V
250
mA
25°C
V
15
mA
25°C
V
2.5
W
25°C
V
2.3
W
25°C
V
2.0
W
1 ADC input port, all six DDC channels, and the relevant signal processing blocks are active.
2 PLL is turned off for power savings.
Rev. 0 | Page 8 of 88
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