AD603(RevC) Просмотр технического описания (PDF) - Analog Devices
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AD603 Datasheet PDF : 14 Pages
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A1
–40.00dB
A2
–51.07dB
INPUT
0dB
VC = 0V
–42.14dB
GPOS GNEG
–8.93dB
–42.14dB
31.07dB
GPOS GNEG
31.07dB
VG1 VO1 = 0.473V
VG2
VO2 = 1.526V
a.
OUTPUT
–20dB
0dB
–11.07dB
INPUT
0dB
0dB
GPOS GNEG
31.07dB
–42.14dB
31.07dB
GPOS GNEG
31.07dB
VC = 1.0V
VG1 VO1 = 0.473V
VG2
VO2 = 1.526V
b.
OUTPUT
20dB
0dB
–28.93dB
INPUT
0dB
0dB
GPOS GNEG
31.07dB
–2.14dB
31.07dB
GPOS GNEG
31.07dB
OUTPUT
60dB
VC = 2.0V
VG1 VO1 = 0.473V
VG2
VO2 = 1.526V
c.
Figure 6. AD603 Gain Control Input Calculations for Sequential Control Operation
AD603
+31.07dB
+10dB
–8.93dB
A1
*
–11.07dB
+31.07dB
A2
*
+28.96dB
–11.07dB
0.473
1.526
GAIN
0
(dB) –22.14 –20
0.5
1.0
1.50
2.0
0
20
40
60
*GAIN OFFSET OF 1.07dB, OR 26.75mV
VC (V)
62.14
Figure 7. Explanation of Offset Calibration for Sequential
Control
With reference to Figure 6, note that VG1 refers to the differen-
tial gain-control input to A1 and VG2 refers to the differential
gain-control input to A2. When VG is zero, VG1 = –473 mV and
thus the gain of A1 is –8.93 dB (recall that the gain of each indi-
vidual amplifier in the maximum-bandwidth mode is –10 dB
for VG = –500 mV and 10 dB for VG = 0 V); meanwhile, VG2 =
–1.908 V so the gain of A2 is “pinned” at –11.07 dB. The over-
all gain is thus –20 dB. This situation is shown in Figure 6a.
When VG = +1.00 V, VG1 = 1.00 V – 0.473 V = +0.526 V,
which sets the gain of A1 to at nearly its maximum value of
31.07 dB, while VG2 = 1.00 V – 1.526 V = 0.526 V, which sets
A2’s gain at nearly its minimum value –11.07 dB. Close analysis
shows that the degree to which neither AD603 is completely
pushed to its maximum or minimum gain exactly cancels in the
overall gain, which is now +20 dB. This is depicted in Figure 6b.
When VG = +2.0 V, the gain of A1 is pinned at 31.07 dB and
that of A2 is near its maximum value of 28.93 dB, resulting in
an overall gain of 60 dB (see Figure 6c). This mode of operation
is further clarified by Figure 8, which is a plot of the separate
gains of A1 and A2 and the overall gain versus the control voltage.
Figure 9 is a plot of the gain error of the cascaded amplifiers versus
the control voltage. Figure 10 is a plot of the gain error of the
cascaded stages versus the control voltages.
70
60
COMBINED
50
40
A1
30
20
10
A2
0
–10
–20
–30
–0.2
0.2
0.6
0.1
1.4
1.8
2.2
VC
Figure 8. Plot of Separate and Overall Gains in Sequential
Control
REV. C
–7–
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