AD5332 Просмотр технического описания (PDF) - Analog Devices
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Компоненты Описание
производитель
AD5332
Analog Devices
AD5332 Datasheet PDF : 20 Pages
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AD5332/AD5333/AD5342/AD5343
AD5343 FUNCTIONAL BLOCK DIAGRAM
AD5343 PIN CONFIGURATION
DB...... 7
DB0
HBEN
CS
WR
A0
CLR
LDAC
POWER-ON
RESET
HIGH BYTE
REGISTER
LOW BYTE
REGISTER
INTER-
FACE
LOGIC
HIGH BYTE
REGISTER
LOW BYTE
REGISTER
RESET
VREF
VDD
AD5343
DAC
REGISTER
12-BIT
DAC
BUFFER
DAC
REGISTER
12-BIT
DAC
BUFFER
VOUTA
HBEN 1
20 DB7
VREF 2
19 DB6
VOUTA 3
18 DB5
VOUTB
GND
CS
WR
4
17 DB4
12-BIT
5 AD5343 16 DB3
6
TOP VIEW 15
(Not to Scale)
DB2
7
14 DB1
A0 8
13 DB0
CLR 9
12 VDD
LDAC 10
11 PD
VOUTB
POWER-DOWN
LOGIC
PD GND
Pin
No.
Mnemonic
1
HBEN
2
3
4
5
6
7
8
9
10
11
12
13–20
VREF
VOUTA
VOUTB
GND
CS
WR
A0
CLR
LDAC
PD
VDD
DB0–DB7
AD5343 PIN FUNCTION DESCRIPTIONS
Function
This pin is used when writing to the device to determine if data is written to the high byte register or the
low byte register.
Unbuffered reference input for both DACs.
Output of DAC A. Buffered output with rail-to-rail operation.
Output of DAC B. Buffered output with rail-to-rail operation.
Ground reference point for all circuitry on the part.
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
Address pin for selecting between DAC A and DAC B.
Asynchronous active low control input that clears all input registers and DAC registers to zeros.
Active low control input that updates the DAC registers with the contents of the input registers. This allows
all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.
–8–
REV. 0
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