AD5342 Просмотр технического описания (PDF) - Analog Devices
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производитель
AD5342
Analog Devices
AD5342 Datasheet PDF : 20 Pages
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DB... 7
DB0
CS
WR
A0
CLR
LDAC
AD5332 FUNCTIONAL BLOCK DIAGRAM
AD5332/AD5333/AD5342/AD5343
AD5332 PIN CONFIGURATION
INTER-
FACE
LOGIC
VREFA
POWER-ON
RESET
INPUT
REGISTER
DAC
REGISTER
8-BIT
DAC
INPUT
REGISTER
DAC
REGISTER
8-BIT
DAC
VDD
AD5332
BUFFER
BUFFER
VOUTA
VOUTB
VREFB 1
20 DB7
VREFA 2
19 DB6
VOUTA 3
18 DB5
VOUTB
GND
CS
WR
4
17 DB4
8-BIT
5 AD5332 16 DB3
6
TOP VIEW 15
(Not to Scale)
DB2
7
14 DB1
A0 8
13 DB0
CLR 9
12 VDD
LDAC 10
11 PD
RESET
POWER-DOWN
LOGIC
VREFB
PD GND
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13–20
Mnemonic
VREFB
VREFA
VOUTA
VOUTB
GND
CS
WR
A0
CLR
LDAC
PD
VDD
DB0–DB7
AD5332 PIN FUNCTION DESCRIPTIONS
Function
Unbuffered reference input for DAC B.
Unbuffered reference input for DAC A.
Output of DAC A. Buffered output with rail-to-rail operation.
Output of DAC B. Buffered output with rail-to-rail operation.
Ground reference point for all circuitry on the part.
Active low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
Active low Write Input. This is used in conjunction with CS to write data to the parallel interface.
Address pin for selecting which DAC A and DAC B.
Asynchronous active low control input that clears all input registers and DAC registers to zeros.
Active low control input that updates the DAC registers with the contents of the input registers. This
allows all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.
REV. 0
–5–
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