AD1882A Просмотр технического описания (PDF) - Analog Devices
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AD1882A Datasheet PDF : 20 Pages
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AD1882A
DIGITAL MICROPHONE INTERFACE TIMING SPECIFICATIONS
The digital microphone interface can support one or two digital
microphones using two or three codec pins. Both uniplex (one
microphone per data pin) and multiplex (two microphones
sharing the same data pin) are supported. The timing for these
configurations are shown in Figure 3 and Figure 4. The interface
can generate a microphone clock at 1.5 MHz, 2.0 MHz, or
3.0 MHz to suit quality and power requirements.
Table 7. Microphone Timing Parameters
Parameter
Timing Requirements
t0
DM_CLK (1.5 MHz) Period
Duty Cycle
t0
DM_CLK (2.0 MHz) Period
Duty Cycle
t0
DM_CLK (3.0 MHz) Period
Duty Cycle
t1
DM_CLK Rise Time
t2
DM_CLK Fall Time
t3
Data Setup to DM_CLK Edge
t4
Data Hold from DM_CLK Edge
Min
Typ
Max
Unit
667
ns
50/50
%
500
ns
50/50
%
333
ns
50/50
%
5
ns
5
ns
100
ns
5
ns
DM_CLK
DM_DATA
t2
t1
t0
t3
t4
Figure 3. Uniplex Microphone Timing
DM_CLK
DM_DATA
t0
t1
t2
t3
t4
LEFT DATA VALID
t3
t4
RIGHT DATA VALID
Figure 4. Multiplex Microphone Timing
LEFT DATA VALID
Rev. 0 | Page 11 of 20 | August 2008
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