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ACS8522A

Synchronous Equipment Timing Source for Stratum 3/4E/4 and SMC Systems

Semtech Corporation 

ACS8522A SETS LITE

ADVANCED COMMS & SENSING

FINAL

DATASHEET

Table of Contents

Section

Page

Description .................................................................................................................................................................................................1

Block Diagram ............................................................................................................................................................................................1

Features .....................................................................................................................................................................................................1

Pin Diagram ...............................................................................................................................................................................................4

Pin Description ...........................................................................................................................................................................................5

Introduction ................................................................................................................................................................................................7

General Description ...................................................................................................................................................................................7

Overview ............................................................................................................................................................................................7

Input Reference Clock Ports ............................................................................................................................................................9

Locking Frequency Modes .......................................................................................................................................................9

Clock Quality Monitoring ................................................................................................................................................................ 10

Activity Monitoring ................................................................................................................................................................. 11

Frequency Monitoring ........................................................................................................................................................... 12

Selection of Input Reference Clock Source .................................................................................................................................. 12

Forced Control Selection ....................................................................................................................................................... 13

Automatic Control Selection ................................................................................................................................................. 13

Ultra Fast Switching .............................................................................................................................................................. 13

Fast External Switching Mode-SRCSW pin .......................................................................................................................... 13

Output Clock Phase Continuity on Source Switchover ....................................................................................................... 14

Modes of Operation ....................................................................................................................................................................... 14

Free-run Mode ....................................................................................................................................................................... 14

Pre-locked Mode ................................................................................................................................................................... 14

Locked Mode ......................................................................................................................................................................... 14

Lost-phase Mode ................................................................................................................................................................... 14

Holdover Mode ...................................................................................................................................................................... 15

Pre-locked2 Mode ................................................................................................................................................................. 17

DPLL Architecture and Configuration ........................................................................................................................................... 17

TO DPLL Main Features ........................................................................................................................................................ 18

T4 DPLL Main Features ........................................................................................................................................................ 18

TO DPLL Automatic Bandwidth Controls .............................................................................................................................. 18

Phase Detectors .................................................................................................................................................................... 18

Phase Lock/Loss Detection .................................................................................................................................................. 19

Damping Factor Programmability ......................................................................................................................................... 19

Local Oscillator Clock ............................................................................................................................................................ 20

Output Wander ...................................................................................................................................................................... 20

Jitter and Wander Transfer ................................................................................................................................................... 23

Phase Build-out ..................................................................................................................................................................... 23

Input-to-Output Phase Adjustment ....................................................................................................................................... 24

Input Wander and Jitter Tolerance ....................................................................................................................................... 24

Using the DPLLs for Accurate Frequency and Phase Reporting ........................................................................................ 26

MFrSync and FrSync Alignment-SYNC2K ............................................................................................................................. 27

Output Clock Ports ......................................................................................................................................................................... 27

PECL/LVDS Output Port Selection ....................................................................................................................................... 27

Output Frequency Selection and Configuration .................................................................................................................. 28

Power-On Reset .............................................................................................................................................................................. 38

Serial Interface ............................................................................................................................................................................... 38

Register Map ........................................................................................................................................................................................... 41

Register Organization .................................................................................................................................................................... 41

Register Access ..................................................................................................................................................................... 41

Interrupt Enable and Clear ................................................................................................................................................... 41

Defaults .................................................................................................................................................................................. 41

Register Descriptions ............................................................................................................................................................................. 45

Revision 1.00/September 2007 © Semtech Corp.

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