A6801(2009) Просмотр технического описания (PDF) - Allegro MicroSystems
Номер в каталоге
Компоненты Описание
производитель
A6801 Datasheet PDF : 11 Pages
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A6800 and
A6801
DABiC-5 Latched Sink Drivers
Package L (A6800) 14-pin SOICN
9.90 ±0.10
14
4° ±4
0.21 ±0.04
1.27
0.65
A
3.90 ±0.10 6.00 ±0.20
0.84
+0.43
–0.44
5.60
12
14X
0.10 C
C
SEATING
PLANE
0.41 ±0.10
1.27
1.75 MAX
0.18
+0.07
–0.08
For Reference Only
Dimensions in millimeters
(reference JEDEC MS-012 AB)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
0.25
SEATING PLANE
GAUGE PLANE
1.75
B PCB Layout Reference View
A Terminal #1 mark area
B Reference pad layout (reference IPC SOIC127P600X175-14M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Package LW (A6801) 24-pin SOICW
15.40±0.20
24
4° ±4
24
0.27
+0.07
–0.06
2.20
A
12
24X
0.10 C
0.41 ±0.10
7.50±0.10 10.30±0.33
9.60
0.84
+0.44
–0.43
C
SEATING
PLANE
12
0.65
0.25
1.27
SEATING PLANE
GAUGE PLANE
B PCB Layout Reference View
1.27
2.65 MAX
For Reference Only
(Reference JEDEC MS-013 AD)
0.20 ±0.10
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Reference pad layout (reference IPC SOIC127P1030X265-24M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Allegro MicroSystems, Inc.
10
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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