A4447
High Voltage Step Down Regulator
Functional Block Diagram
BOOT
VIN
ENB
μC
TSET
GND
VBB UVLO
TSD
Boot Charge
–
Switch
Disable
Switch PWM Control
+
I_Peak
Clamp
–
I_Demand
–
Error
COMP
Soft Start
Ramp Generation
VIN
LX
L1
D1
CBYP
FB
VOUT
ESR
COUT
Bias Supply
VBIAS
0.8 V
VBIAS is connected to VOUT
when VOUT target is between
3.3 and 5 V
Allegro MicroSystems, Inc.
3
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com