A3949(2013) Просмотр технического описания (PDF) - Allegro MicroSystems
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A3949 Datasheet PDF : 7 Pages
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A3949
DMOS Full-Bridge Motor Driver
LB Package
N/C 1
MODE 2
PHASE 3
GND 4
SLEEP 5
ENABLE 6
OUTA 7
SENSE 8
16 N/C
15 VREG
14 VCP
13 GND
12 CP2
11 CP1
10 OUTB
9 VBB
Name
N/C
MODE
PHASE
GND
SLEEP
ENABLE
OUTA
SENSE
VBB
OUTB
CP1
CP2
GND
VCP
VREG
N/C
Description
Not used
Logic input
Logic input for direction control
Ground
Logic input
Logic input
Output A for full bridge
Power return
Load supply voltage
Output B for full bridge
Charge pump capacitor
Charge pump capacitor
Ground
Reservoir capacitor
Low side gate supply decoupler
Not used
*These pins are internally connected.
Number
1
2
3
4*
5
6
7
8
9
10
11
12
13*
14
15
16
Allegro MicroSystems, LLC
6
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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