A3988 Просмотр технического описания (PDF) - Allegro MicroSystems
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A3988 Datasheet PDF : 13 Pages
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A3988
Quad DMOS Full Bridge PWM Motor Driver
ELECTRICAL CHARACTERISTICS1, valid at TA = 25°C, VBB = 36 V, unless otherwise noted
Characteristics
Symbol
Test Conditions
Load Supply Voltage Range
Logic Supply Voltage Range
VDD Supply Current
Output On Resistance
Vf , Outputs
Output Leakage
VBB Supply Current
VBB
VDD
IDD
RDS(on)
IDSS
IBB
Operating
Operating
Source driver, IOUT = –1.2 A, TJ = 25°C
Sink driver, IOUT = 1.2 A, TJ = 25°C
IOUT = 1.2 A
Outputs, VOUT = 0 to VBB
IOUT = 0 mA, outputs on, PWM = 50 kHz,
DC = 50%
Control Logic
Logic Input Voltage
Logic Input Current
Input Hysteresis
VIN(1)
VIN(0)
IIN
Vhys
VIN = 0 to 5 V
PWM change to source on
Propagation Delay Times
PWM change to source off
tpd
PWM change to sink on
PWM change to sink off
Crossover Delay
Blank Time
VREFx Pin Input Voltage Range
VREFx Pin Reference Input Current
Current Trip-Level Error3
Protection Circuits
tCOD
tBLANK
VREFx
IREF
VERR
Operating
VREF = 1.5
VREF = 1.5, phase current = 100%
VREF = 1.5, phase current = 67%
VREF = 1.5, phase current = 33%
VBB UVLO Threshold
VBB Hysteresis
VDD UVLO Threshold
VDD Hysteresis
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
VUV(VBB)
VUV(VBB)hys
VUV(VDD)
VUV(VDD)hys
TJTSD
TJTSDhys
VBB rising
VDD rising
Min.
8.0
3.0
–
–
–
–
–20
–
Typ.2
–
–
7
700
700
–
–
–
Max.
36
5.5
10
800
800
1.2
20
8
0.7×VDD
–
–20
150
350
35
350
35
300
0.7
0.0
–
–5
–5
–15
–
–
<1.0
300
550
–
550
–
425
1
–
–
–
–
–
–
0.3×VDD
20
500
1000
300
1000
250
1000
1.3
1.5
±1
5
5
15
7.3
7.6
7.9
400
500
600
2.65
2.8
2.95
75
105
125
155
165
175
–
15
–
Units
V
V
mA
mΩ
mΩ
V
μA
mA
V
V
μA
mV
ns
ns
ns
ns
ns
μs
V
μA
%
%
%
V
mV
V
mV
°C
°C
1For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for indi-
vidual units, within the specified maximum and minimum limits.
3VERR = [(VREF/3) – VSENSE] / (VREF/3).
Allegro MicroSystems, Inc.
4
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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