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A1225LLTTR-T Просмотр технического описания (PDF) - Allegro MicroSystems

Номер в каталоге
Компоненты Описание
производитель
A1225LLTTR-T
Allegro
Allegro MicroSystems Allegro
A1225LLTTR-T Datasheet PDF : 12 Pages
First Prev 11 12
A1225, A1227
and A1229
Hall Effect Latch for High Temperature Operation
Package LT 3-Pin SOT-89
B
4.14
+0.10
–0.20
2.57
+0.03
–0.28
4.47
+0.13
–0.08
1.73 ±0.10
E
2.24
D
E
1.14
2.16 REF
1
10° REF
0.43
+0.05
–0.07
2X 1.50 NOM
2
3
Branded Face
1.45
+0.15
–0.05
0.51
+0.05
–0.07
0.41
+0.03
–0.06
0.38 MIN
6° REF
Parting Line
10° REF
1.04 ±0.15
2.50
2.00
0.80
2.60
4.60
1.20
1.50
0.70
C PCB Layout Reference View
Basic pads for low-stress, not self-aligning
Additional pad for low-stress, self-aligning
Additional area for IPC reference layout
NN
1
A Standard Branding Reference View
= Supplier emblem
N = Last two digits of device part number
Updated package drawing only. Allegro package assembly tooling has not changed.
For Reference Only; not for tooling use (reference DWG-9064)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Branding scale and appearance at supplier discretion
B Gate and tie bar burr area
C Reference land pattern layout;
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances
D Active Area Depth, 0.77 mm
E Hall element; not to scale
Allegro MicroSystems, Inc.
11
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com

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