93C56 Просмотр технического описания (PDF) - Atmel Corporation

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93C56

3-wire Serial EEPROM 2K (256 x 8 or 128 x 16) and 4K (512 x 8 or 256 x 16)

Atmel Corporation 

5. Functional Description

The AT93C56B/66B is accessed via a simple and versatile 3-wire serial communication interface. Device

operation is controlled by seven instructions issued by the Host processor. A valid instruction starts with a rising

edge of CS and consists of a Start bit (Logic 1), followed by the appropriate opcode, and the desired memory

address location.

Table 5-1. AT93C56B/66B Instruction Set

Instruction SB Opcode

Address

x8(1)

x16(1)

READ

1

10

A8 – A0

A7 – A0

Data

x8

x16

Comments

Reads data stored in memory at

specified address.

EWEN

1

00 11XXXXXXX 11XXXXXX

Write Enable must precede all

programming modes.

ERASE

1

11

A8 – A0

A7 – A0

Erases memory location AN – A0.

WRITE

1

01

A8 – A0

A7 – A0

D7 – D0 D15 – D0 Writes memory location AN – A0.

ERAL

WRAL

1

00 10XXXXXXX 10XXXXXX

Erases all memory locations.

Valid only at VCC3 (Section 4.2, “DC

Characteristics” on page 4).

Writes all memory locations.

1

00 01XXXXXXX 01XXXXXX D7 – D0 D15 – D0 Valid only at VCC3 (Section 4.2) and

Disable Register cleared.

EWDS

1

00 00XXXXXXX 00XXXXXX

Disables all programming

instructions.

Note: 1. The Xs in the address field represent don’t care values, and must be clocked.

READ: The READ instruction contains the address code for the memory location to be read. After the

instruction and address are decoded, data from the selected memory location is available at the Serial Output

pin, DO. Output data changes are synchronized with the rising edges of the Serial Clock pin, SK. It should be

noted that a dummy bit (Logic 0) precedes the 8-bit or 16-bit data output string. The AT93C56B/66B supports

sequential Read operations. The device will automatically increment the internal address pointer and clock out

the next memory location as long as Chip Select (CS) is held high. In this case, the dummy bit (Logic 0) will not

be clocked out between memory locations, thus allowing for a continuous stream of data to be read.

Erase/Write Enable (EWEN): To ensure data integrity, the part automatically goes into the Erase/Write Disable

(EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first

before any programming instructions can be carried out.

Note: Once in the EWEN state, programming remains enabled until an EWDS instruction is executed, or VCC

power is removed from the part.

6

AT93C56B/66B [DATASHEET]

Atmel-8735C-SEEPROM-AT93C56B-66B-Datasheet_012015

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