WMS1M1-XDEX
TIMING WAVEFORM - READ CYCLE
2
ADDRESS
Q
tRC
tAA
tOH
PREVIOUS DATA VALID
DATA VALID
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
ADDRESS
CS
Q
tRC
tAA
tACS
tCLZ
HIGH IMPEDANCE
tCHZ
DATA VALID
READ CYCLE 2 (WE = VIH)
WRITE CYCLE - WE CONTROLLED
ADDRESS
CS
tAS
WE
D
tWC
tAW
tCW
tAH
tWP
tWHZ
tDW
tOW
tDH
DATA VALID
Q
WRITE CYCLE 1, WE CONTROLLED
WRITE CYCLE - CS CONTROLLED
ADDRESS
CS
WE
D
Q
tWC
tAW WS32K32-XHX
tAS
tCW
tAH
tWP
tDW
tDH
DATA VALID
WRITE CYCLE 2, CS CONTROLLED
White Microelectronics • Phoenix, AZ • (602) 437-1520
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