PDSP16318MC Просмотр технического описания (PDF) - Mitel Networks

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PDSP16318MC

Complex Accumulator

Mitel Networks 

Supersedes version DS3708 - 2.4 September 1996

PDSP16318/PPDDSSPP16131683/1163818AA

Complex Accumulator

Advance Information

DS3708 - 3.1 November 1998

The PDSP16318/A contains two independent 20-bit

Adder/Subtractors combined with accumulator registers and

shift structures. The four port architecture permits full 20MHz

throughout in FFT and filter applications.

Two PDSP16318As combined with a single PDSP16112A

Complex Multiplier provide a complete arithmetic solution for

a Radix 2 DIT FFT Butterfly. A new complex Butterfly result

can be generated every 50ns allowing 1K complex FFTs to be

executed in 256µs.

GC100

FEATURES

s Full 20MHz Throughout in FFT Applications

s Four Independent 16-bit I/O Ports

s 20-bit Addition or Accumulation

s Fully Compatible with PDSP16112 Complex Multiplier

s On Chip Shift Structures for Result Scaling

s Overflow Detection

s Independent Three-State Outputs and Clock

Enables for 2 Port 20MHz Operation

s 1.4 micron CMOS

s 500mW Maximum Power Dissipation

s 100 CQFP package

APPLICATIONS

s High speed Complex FFT or DFTs

s Complex Finite Impulse Response (FIR) Filtering

s Complex Conjugation

s Complex Correlation/Convolution

Fig.1 Pin connections - Top view (GC100)

ASSOCIATED PRODUCTS

PDSP16112 16 x 12 Complex Multiplier

PDSP16116 16 x 16 Complex Multiplier

PDSP1601 ALU and Barrel Shifter

PDSP16330 Pythagoras Processor

ORDERING INFORMATION

Industrial (-40°C to +85°C)

PDSP16318A/IG/GC1R (20MHz - QFP)

Military (-55°C to +125°C)

PDSP16318/MC/GC1R (10MHz - QFP

MIL STD 883C Screened)

N.B. Further details of the Military grade part are available

in a separate datasheet

A

REG

DELAY

B

SHIFT

REG

C

A

B

REG

A

SHIFT

B

Fig. 2 PDSP16318 simplified block diagram

REG

D

1

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