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78P7200 Просмотр технического описания (PDF) - TDK Corporation

Номер в каталоге
Компоненты Описание
производитель
78P7200
TDK
TDK Corporation TDK
78P7200 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
78P7200
E3/DS3/STS-1
Line Interface Unit
PIN DESCRIPTION
RECEIVER
NAME
LIN+, LIN-
RPOS
RNEG
RCLK
LOWSIG
TYPE
I
O
O
O
O
DESCRIPTION
Differential inputs, transformer-coupled from coax cable.
Unipolar receiver output, active as result of positive pulse at inputs.
Unipolar receiver output, active as result of negative pulse at inputs.
Recovered Clock from line data.
Low signal logic output indicating that input signal is less than threshold value.
TRANSMITTER
TPOS
TNEG
TCLK
LOUT+
LOUT-
LBO
OPT!
OPT@
I
Unipolar transmitter data input, active high.
I
Unipolar transmitter data input, active high.
I
Transmitter clock input, active high.
O
Output to transformer for positive data pulses.
O
Output to transformer for negative data pulses.
I
Transmitter line buildout control. Set low for all E3 or for DS3/STS-1 cable of 225'
or longer. Set high for short DS3/ STS-1 cable.
I
Transmit option 1. Set high for DS3/STS-1 and set low for E3.
I
Transmit option 2. Disables output driver and reduces output bias current when
low. Set high for normal transmit operation.
EXTERNAL COMPONENT CONNECTION
RFO
LF1, LF2
CPD
I
Resistor connected to RGND adjusts the center frequency of receiver phase
locked loop oscillator and the transmitter pulse width and amplitude.
-
Resistor-capacitor loop filter network to establish bandwidth of phase locked loop.
-
Capacitor to RVcc that is connected to peak detector node to reduce signal-
dependent ripple on that node.
POWER
TVcc
RVcc
DVcc
TGND
RGND
DGND
NCR
NCT
NCD
-
5V power supply for transmit circuits.
-
5V power supply for receive circuits.
-
5V power supply for receive logic circuits.
-
Ground return for transmit circuits.
-
Ground return for receive circuits.
-
Ground return for receive logic circuits.
-
No connect, Tie to Receiver Ground (RGND).
-
No connect, Tie to Transmitter Ground (TGND).
-
No connect, Tie to Digital Ground.
Page: 5 of 11
© 2005 Teridian Semiconductor Corporation
Rev 3.0

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