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74VCX16245DTRG

Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver With 3.6 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)

ON Semiconductor 

74VCX16245

T/R1 1

48 OE1

1

T/R1

24

T/R2

B0 2

B1 3

47 A0

46 A1

OE1 48

OE2 25

GND 4

45 GND

B2 5

B3 6

44 A2

A0:7

43 A3

B0:7

A8:15

B8:15

VCC 7

B4 8

42 VCC

41 A4

B5 9

GND 10

B6 11

40 A5

39 GND

38 A6

Figure 2. Logic Diagram

One of Eight

B7 12

37 A7

B8 13

36 A8

B9 14

GND 15

B10 16

B11 17

VCC 18

B12 19

B13 20

GND 21

B14 22

B15 23

T/R2 24

35 A9

34 GND

33 A10

32 A11

31 VCC

30 A12

29 A13

28 GND

27 A14

26 A15

25 OE2

Figure 1. 48−Lead Pinout

(Top View)

PIN NAMES

Pins

Function

1

T/R1

EN1

OE1 48

EN2

25

OE2 24

T/R2

EN3

EN4

A0 47

A1 46

A2 44

A3 43

A4 41

A5 40

A6 38

A7 37

A8 36

A9 35

A10 33

A11 32

A12 30

A13 29

A14 27

A15 26

1 1∇

1 2∇

1 3∇

1 4∇

2 B0

3 B1

5 B2

6 B3

8 B4

9 B5

11 B6

12 B7

13 B8

14 B9

16 B10

17 B11

19 B12

20 B13

22 B14

23 B15

OEn

T/Rn

A0−A15

B0−B15

Output Enable Inputs

Transmit/Receive Inputs

Side A Inputs or 3−State Outputs

Side B Inputs or 3−State Outputs

Figure 3. IEC Logic Diagram

Inputs

OE1

T/R1

Outputs

Inputs

OE2

T/R2

Outputs

L

L

Bus B0:7 Data to Bus A0:7

L

L

Bus B8:15 Data to Bus A8:15

L

H

Bus A0:7 Data to Bus B0:7

L

H

Bus A8:15 Data to Bus B8:15

H

X

High Z State on A0:7, B0:7

H

X

High Z State on A8:15, B8:15

H = High Voltage Level; L = Low Voltage Level; X = High or Low Voltage Level and Transitions Are Acceptable

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