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74V1G126CTR Просмотр технического описания (PDF) - STMicroelectronics

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74V1G126CTR
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74V1G126CTR Datasheet PDF : 10 Pages
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74V1G126
SINGLE BUS BUFFER (3-STATE)
s HIGH SPEED: tPD = 3.4ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1G126 is an advanced high-speed CMOS
SINGLE BUS BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
3-STATE control input 1G has to be set LOW to
place the output into the high impedance state.
SOT23-5L
SOT323-5L
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74V1G126STR
74V1G126CTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2004
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