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74LVX16373TTR

LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH (3-STATE) WITH 5V TOLERANT INPUTS

STMicroelectronics 

74LVX16373

AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)

Test Condition

Value

Symbol

Parameter

VCC CL

(V) (pF)

TA = 25°C

-40 to 85°C -55 to 125°C Unit

Min. Typ. Max. Min. Max. Min. Max.

tPLH Propagation Delay 2.7 15

tPHL Time

LE to Qn

2.7 50

3.3(*) 15

7 14 1 16 1 16

9 15.5 1 17 1 17

ns

5.5 13 1 15 1 15

3.3(*) 50

7 14.5 1 16.5 1 16.5

tPLH Propagation Delay 2.7 15

tPHL Time

Dn to Qn

2.7 50

3.3(*) 15

8 14 1 16 1 16

9.5 15 1 17 1 17

ns

5.4 13 1 15 1 15

3.3(*) 50

7.5 14 1 16 1 16.5

tPZL

tPZH

Output Enable

Time

2.7 15

2.7 50

3.3(*) 15

7 14.9 1 16 1 16

9.5 16 1 17 1 17

5.2 13

1

15

1

15 ns

3.3(*) 50

7.6 14.9 1 16 1 16

tPLZ Output Disable

tPHZ Time

2.7 50

3.3(*) 50

9 17 1 18 1 18

ns

7.7 15.5 1 17 1 17

tW

LE pulse Width,

HIGH

2.7 50

3.3(*) 50

6

5

6

6

ns

5

5

tS

Setup Time Dn to

LE HIGH or LOW

2.7 50

3.3(*) 50

4.5

4

4.5

4.5

ns

4

4

th

Hold Time Dn to LE 2.7 50

HIGH or LOW

3.3(*) 50

1.5

1

1.5

1.5

ns

1

1

tOSLH

tOSHL

Output to Output

Skew Time (note

1,2)

2.7 50

3.3(*) 50

0.5 1.0

1.5

1.5

ns

0.5 1.0

1.5

1.5

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-

ing in the same direction, either HIGH or LOW

2) Parameter guaranteed by design

(*) Voltage range is 3.3V ± 0.3V

CAPACITIVE CHARACTERISTICS

Test Condition

Value

Symbol

Parameter

VCC

(V)

TA = 25°C

-40 to 85°C -55 to 125°C Unit

Min. Typ. Max. Min. Max. Min. Max.

CIN Input Capacitance

2.5 10

10

10 pF

COUT Output

Capacitance

4

pF

CPD Power Dissipation

Capacitance

3.0

fIN = 10MHz

17

pF

(note 1)

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)

5/10

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