74LV4020 Просмотр технического описания (PDF) - NXP Semiconductors.
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74LV4020 Datasheet PDF : 20 Pages
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Philips Semiconductors
74LV4020
14-stage binary ripple counter
9. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
quiescent supply current
ground current
storage temperature
total power dissipation
DIP16 package
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or
VO > VCC + 0.5 V
VO = −0.5 V to VCC + 0.5 V
Tamb = −40 °C to +125 °C
−0.5
-
-
-
-
-
−65
[1] -
+7 V
±20 mA
±50 mA
±25 mA
50 mA
−50 mA
+150 °C
750 mW
SO16 package
[2] -
500 mW
SSOP16 and
TSSOP16 packages
[3] -
400 mW
[1] Above Tamb = 70 °C: Ptot derates linearly with 12 mW/K.
[2] Above Tamb = 70 °C: Ptot derates linearly with 8 mW/K.
[3] Above Tamb = 60 °C: Ptot derates linearly with 5.5 mW/K.
10. Recommended operating conditions
Table 6: Recommended operating conditions
Symbol Parameter
Conditions
Min Typ Max Unit
VCC
VI
VO
Tamb
∆t/∆V
supply voltage
[1] 1.0
3.3
input voltage
0
-
output voltage
0
-
ambient temperature
−40 -
input transition rise and VCC = 1.0 V to 2.0 V
-
-
fall rate
VCC = 2.0 V to 2.7 V
-
-
VCC = 2.7 V to 3.6 V
-
-
VCC = 3.6 V to 5.5 V
-
-
5.5
VCC
VCC
+125
500
200
100
50
V
V
V
°C
ns/V
ns/V
ns/V
ns/V
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to
function down to VCC = 1.0 V (with input levels GND or VCC).
74LV4020_1
Product data sheet
Rev. 01 — 29 November 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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