74F181 Просмотр технического описания (PDF) - Philips Electronics
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74F181 Datasheet PDF : 9 Pages
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Philips Semiconductors FAST Products
Arithmetic logic unit
Product specification
74F181
When the Mode Control input (M) is High, all internal carries are
inhibited and the device performs logic operations on the individual
bits as listed. When the Mode control input is Low, the carries are
enabled and the device performs arithmetic operations on the two
4-bit words. The device incorporates full internal carry look-ahead
and provides for either ripple carry between device using the Cn+4
output, or for carry look-ahead between packages using the signals
P (Carry Propagate) and G (Carry Generate). P and G are not
affected by carry in. When speed requirements are not stringent, it
can be used in a simple ripple carry mode by connecting the Carry
output (Cn+4) signal to the Carry input (Cn) of the next unit. For
high-speed operation, the device is used in conjunction with the
74F182 carry look-ahead circuit. One carry look-ahead package is
required for each group of four 74F181 devices. Carry look-ahead
can be provided at various levels and offers high speed capability
over extremely long word lengths.
The A=B output from the device goes High when all four F outputs
are High and can be used to indicate logic equivalence over 4-bits
when the unit is in the subtract mode. The A=B output is
open-collector and can be wired-AND with other A=B outputs to give
a comparison for more than 4 bits. The A=B signal can also be used
with the Cn+4 signal to indicate A>B and A<B. The Function Table
lists the arithmetic operations that are performed without a carry in.
An incoming carry adds a one to each operation. Thus select code
LHHL generates A minus B minus 1 (two’s complement notation)
without a carry in and generates A minus B when a carry is applied.
Because subtraction is actually performed by complementary
addition (one’s complement), a carry out means borrow; thus, a
carry is generated when there is no underflow and no carry is
generated when there is underflow. As indicated, this device can be
used with either active-Low inputs producing active-Low outputs or
with active-High inputs producing active-High outputs. For either
case, the table lists the operations that are performed to the
operands labeled inside the logic symbol.
MODE-SELECT FUNCTION TABLE
MODE SELECT INPUTS
ACTIVE HIGH INPUTS & OUTPUTS
S3
S2
S1
S0
Logic (M=H)
Arithmetic** (M=L) (Cn=H)
L
L
L
L
A
A
L
L
L
H
A+B
A+B
L
L
H
L
AB
A+B
L
L
H
H
Logical 0
minus 1
L
H
L
L
AB
A plus AB
L
H
L
H
B
(A+B) plus AB
L
H
H
L
A⊕B
A minus B minus 1
L
H
H
H
AB
AB minus 1
H
L
L
L
A+B
A plus AB
H
L
L
H
A⊕B
A plus B
H
L
H
L
B
(A+B) plus AB
H
L
H
H
AB
AB minus 1
H
H
L
L
Logical 1
A plus A*
H
H
L
H
A+B
(A+B) plus A
H
H
H
L
A+B
(A+B) plus A
H
H
H
H
A
A minus 1
H = High voltage level
L = Low voltage level
* = Each bit is shifted to the next more significant position.
** = Arithmetic operations expressed in two’s complement notation.
ACTIVE LOW INPUTS & OUTPUTS
Logic (M=H)
Arithmetic** (M=L) (Cn=L)
A
A minus 1
AB
AB minus 1
A+B
AB minus 1
Logical 1
minus 1
A+B
A plus (A+B)
B
AB plus (A+B)
A⊕B
A minus B minus 1
A+B
A+B
AB
A plus (A+B)
A⊕B
A plus B
B
AB plus (A+B)
A+B
A+B
Logical 0
A plus A*
AB
AB plus A
AB
AB plus A
A
A
March 3, 1989
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