DSP56F826PB Просмотр технического описания (PDF) - Freescale Semiconductor

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DSP56F826PB

16-bit Digital Signal Controllers

Freescale Semiconductor 

Part 2 Signal/Connection Descriptions

2.1 Introduction

The input and output signals of the 56F826 are organized into functional groups, as shown in Table 2-1

and as illustrated in Figure 2-1. Table 2-1 describes the signal or signals present on a pin.

Table 2-1 Functional Group Pin Allocations

Functional Group

Power (VDD, VDDIO or VDDA)

Ground (VSS, VSSIO or VSSA)

PLL and Clock

Address Bus1

Data Bus1

Bus Control

Quad Timer Module Ports1

JTAG/On-Chip Emulation (OnCE)

Dedicated General Purpose Input/Output

Synchronous Serial Interface (SSI) Port1

Serial Peripheral Interface (SPI) Port1

Serial Communications Interface (SCI) Ports

Interrupt and Program Control

1. Alternately, GPIO pins

Number of Pins

(3,4,1)

(3,4,1)

3

16

16

4

4

6

16

6

4

4

5

56F826 Technical Data, Rev. 14

8

Freescale Semiconductor

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