DSP56F826PB Просмотр технического описания (PDF) - Freescale Semiconductor

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DSP56F826PB

16-bit Digital Signal Controllers

Freescale Semiconductor 

Electrical Design Considerations

• Because the controller’s output signals have fast rise and fall times, PCB trace lengths should be minimal.

• Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.

This is especially critical in systems with higher capacitive loads that could create higher transient currents

in the VDD and VSS circuits.

• Take special care to minimize noise levels on the VREF, VDDA and VSSA pins.

• When using Wired-OR mode on the SPI or the IRQx pins, the user must provide an external pull-up device.

• Designs that utilize the TRST pin for JTAG port or OnCE module functionality (such as development or

debugging systems) should allow a means to assert TRST whenever RESET is asserted, as well as a means

to assert TRST independently of RESET. TRST must be asserted at power up for proper operation. Designs

that do not require debugging functionality, such as consumer products, TRST should be tied low.

• Because the Flash memory is programmed through the JTAG/OnCE port, designers should provide an

interface to this port to allow in-circuit Flash programming.

56F826 Technical Data, Rev. 14

Freescale Semiconductor

53

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