DSP56F802TA80E(2005) Просмотр технического описания (PDF) - Freescale Semiconductor
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DSP56F802TA80E Datasheet PDF : 40 Pages
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Table 2-7 Serial Communications Interface (SCI0) Signals (Continued)
No. of
Pins
1
Signal
Name
RXD0
Signal
Type
Input
State During
Reset
Input
Signal Description
Receive Data (RXD0)—SCI0 receive data input
GPIOB1
Input/
Output
Input
Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that can
be individually programmed as an input or output pin.
After reset, the default state is SCI input.
2.6 Analog-to-Digital Converter (ADC) Signals
No. of
Pins
3
2
1
Signal
Name
ANA2-4
ANA6-7
VREF
Table 2-8 Analog to Digital Converter Signals
Signal
Type
Input
Input
Input
State During
Reset
Input
Input
Input
Signal Description
ANA2-4—Analog inputs to ADC, channel 1
ANA6-7—Analog inputs to ADC, channel 2
VREF—Analog reference voltage. Must be set to VDDA - 0.3V for
optimal performance.
2.7 Quad Timer Module Signals
Table 2-9 Quad Timer Module Signals
No. of
Pins
2
Signal
Name
TD1-2
Signal
Type
Input/
Output
State During
Reset
Input
Signal Description
TD1-2—Timer D Channel 1-2
GPIOA1-2 Input/
Output
Input
Port A GPIO—These pins are General Purpose I/O (GPIO) pins that
can be individually programmed as input or output pins.
After reset, the default state is the quad timer input.
56F802 Technical Data, Rev. 7
12
Freescale Semiconductor
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