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MC34710EW Просмотр технического описания (PDF) - Freescale Semiconductor

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MC34710EW
Freescale
Freescale Semiconductor Freescale
MC34710EW Datasheet PDF : 17 Pages
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FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
VI/O Switching Regulator
The VI/O switching regulator output voltage is determined
by the Mode digital input terminals. The 34710’s Mode
terminals select the output voltage. For example, if Mode2,
Mode1, and Mode0 are set to 0, 0, 0 (respectively) then VI/O
will be set to 5.0 V; if Mode2, Mode1, and Mode0 are all left
floating (i.e., Open, Open, and Open), then the voltage for
VI/O will be set to 3.3 V. Table 2 provides the truth table for
setting the various combination of regulator outputs via the
Mode pins.
The topology of the regulator is a hysteretic buck regulator
operating from the internal ~200 kHz oscillator.
VCORE Linear Regulator
The VCORE linear LDO (low drop-out) regulator can
produce either a +3.3 V, 2.5 V, 1.8 V, or 1.5 V output voltage
at currents up to 500 mA. The input to the VCORE regulator
is a terminal that may be connected to the VI/O regulator
output or to an external power supply. Note, the minimum
input voltage level must be equal to or greater than the
selected VCORE voltage + 0.8 V. (I.e., 0.8V is the LDO
regulator drop out voltage.)
The Mode terminals select the output voltage as depicted
in Table 2.
Mode2
Table 2. VI/O and VCORE Regulator
Output Voltage Selection
Mode1 Mode0
VI /O (V)
VCORE (V)
0
0
0
5.0
3.3
0
0
Open
3.3
2.5
0
Open
0
5.0
1.8
0
Open
Open
3.3
1.8
Open
0
0
5.0
2.5
Open
0
Open
3.3
2.5
Open
Open
0
5.0
1.5
Open
Open
Open
3.3
1.5
Open indicates terminal is not connected externally (i.e. floating).
FUNCTIONAL TERMINAL DESCRIPTION
Power Supply Input (B+)
Main supply voltage for the VI/O Switching Regulator and
general chip bias circuitry.
Core Voltage Regulator Input (Lin B+)
Supply voltage for the VCORE Regulator. May be provided
by the VI/O regulator output or from an independent supply.
Mode Control (MODE 0,1,2)
Mode select terminals to select the VI/O and VCORE output
voltages per table 2. Pull to ground for low state, float for high
state.
Switching Capacitors 1 and 2 (CP1/CP2)
Terminals for the Charge Pump capacitor.
Boost Voltage (VB)
The Boost Voltage is an output terminal used for the
charge pump boost voltage and is a connection point for the
Charge Pump bulk capacitor.It provides a gate drive for the
VI/O Switch FET.
Reset (RST)
Reset is an output terminal for supervisory functions. This
terminal is in high state during normal operation and low state
during fault conditions. This terminal has no input function
and requires an external pull-up resistor.
The RST terminal is an open drain output driver to prevent
oscillations during the transition. It is recommended to
connect a 0.1 uF capacitor between the CT pin and RST pin.
Note: error conditions must be present for a minimum time,
tFILTER, before the 34710 responds to them. Once all error
conditions have been cleared, RST is held low for an
additional time of tDELAY.
Reset Delay Capacitor (CT)
This terminal is the external delay. It is used with a
capacitor to ground to delay RST turn-on time and to RST to
prevent RST oscillations during chip power-on.
VI/O Switching Regulator Feedback (VFB)
This terminal is the feedback input for the VI/O Switching
Regulator and the output of the regulator application.
VI/O Switching Regulator output (VSWITCH)
This terminal is the Switching output for the VI/O Buck
Regulator. It has internal high side FET.
Analog Integrated Circuit Device Data
Freescale Semiconductor
34710
9

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