MC33289DW Просмотр технического описания (PDF) - Freescale Semiconductor

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MC33289DW

Dual High-Side Switch 40 mΩ

Freescale Semiconductor 

PIN CONNECTIONS

PIN CONNECTIONS

PIN ASSIGNMENT

VBAT 1

VBAT 2

OUT1 3

OUT1 4

VBAT 5

VBAT 6

NC

7

IN1

8

ST1 9

OLDE 10

20 VBAT

19 VBAT

18 OUT2

17 OUT2

16 VBAT

15 VBAT

14 NC

13 IN2

12 ST2

11 GND

Figure 2. 33289 Pin Connections

Table 1. Pin Function Description

Pin Number

Pin Name

Pin Function

Definition

1, 2, 5, 6, 15, 16,

19, 20

VBAT

Supply Voltage

These are the power supply pins of the device. These pins are directly connected

with the lead frame of the package and are tied to the drain of the switching

MOSFET. These pins can be directly connected to the battery voltage. In addition

to their supply function, these pins participate to the thermal behavior of the

device in conducting the heat from the switching MOSFET to the printed circuit

board.

3, 4, 18, 17

OUT1

OUT2

OUTPUT Channel 1

OUTPUT Channel 2

Pins 3 and 4 are the output 1 pins. Pins 17 and 18 are the output 2 pins. They are

directly connected to the source of the power MOSFET. These pins are used by

the control circuitry to sense the device output voltage. The RDSON is 40 mΩ max

per output at 25°C and will increase to a maximum of 75 mΩ at 150°C junction

temperature.

8, 13

IN1

INPUT Channel 1 These are the device input pins which directly control their associated outputs.

IN2

INPUT Channel 2

The levels are CMOS compatible. When the input is a logic low, the associated

output MOSFET is in the off state. When input is high, the MOSFET is turned on

and the load is activated.

When both inputs are low, the device is in standby mode and its supply current is

reduced. Each input pin has an internal active pull down, so that it will not float if

disconnected.

9, 12

ST1

Status for Channel 1 These pins are the channel 1 and channel 2 fault detection flags. Their internal

ST2

Status for Channel 2 structure is an open drain architecture with an internal clamp at 6.0 V. An external

pull up resistor connected to VDD (5.0 V) is needed. This is an active low output.

If the device is in its normal condition the status lines will be high. If open load or

other fault occurs, the associated channel status flag will be pulled low. See

Functional Truth Table.

10

OLDE

Open Load Detection This pin is a digital input which enables the open load current diagnostic circuitry.

Enable

When OLDE is a logic low, the open load circuitry is not powered and the device’s

bias current draw is at a minimum. If OLDE is a logic high, the open load circuitry

is functional at the price of a higher bias current draw. OLDE pin has a pull down

resistor.

11

GND

GROUND

This is the GND pin of the device.

33289

2

Analog Integrated Circuit Device Data

Freescale Semiconductor

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