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TQ6122 Просмотр технического описания (PDF) - TriQuint Semiconductor

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TQ6122 Datasheet PDF : 23 Pages
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TQ6122
Specifications
Table 1. Absolute Maximum Ratings (1,2)
Symbol
AGND, DGND
VSS
VAA
VO, VO (MAX)
VI (MAX)
II (MAX)
PD
TC
TS
Description
Analog and digital ground
Digital power
Analog power
Analog output (1 V F.S.)
Digital input levels
Digital input currents
Power dissipation
Case backside temperature
Storage temperature
Min
Typ
–2
–7
–10
–2.5
VSS –0.5
–1
–65
–65
Max
+2
+2.5
+0.5
+1
3.0
+135
+150
Notes: 1. Unless otherwise specified: AGND = DGND = 0 V, VSS = VAA = –5 V, VFS = 1 V pk–pk, case temperature = 27 °C.
2. Exceeding the absolute maximum ratings may damage the device. The value shown for a particular
parameter is determined with all other parameters at their nominal values.
Table 2. DC Characteristics (1)
Units
V
V
V
V
V
mA
W
°C
°C
Symbol
Description
Test Conditions
Min.
Typ.
Max.
Unit
VAA
IAA
VSS
ISS
PD
VECLREF
IECLREF
RECLREF
CECLREF
VIH(DC)
VIL(DC)
VCLKH (DC),
VCLKH (DC)
VCLKL (DC),
VCLKL (DC)
IIN
CIN
VOUT (MAX),
VOUT (MAX)
VOUT (MIN),
VOUT (MIN)
Analog supply
VAA current
Digital supply
VSS current
Power dissipation
ECL reference level
ECL ref. input bias current
ECL ref. input resistance
ECL ref. input capacitance
Data input HIGH (ECL)
Data input LOW (ECL)
Clock HIGH input
Note 2
–5.25
–4.75
V
VFS = 1 V pk–pk
Note 2
50
62
80
mA
–5.5
–4.5
V
145
200
265
mA
0.9
1.3
1.85
W
Note 3, Figure 1
–1.5
–1.3
–1.1
V
Note 3, Figure 1 VECLREF = ±0.2 V –5
0
+5
mA
Figure 1
50
2
pF
DC value (VECLREF = –1.3 V)
DC value (VECLREF = –1.3 V)
Differential clock, Note 4
–1100
VTT
VECLREF +0.3
–500
mV
–1500
mV
–0.7
V
Clock LOW input
Differential clock, Note 4
VTT
VECLREF –0.3 V
Data, clock input bias current VIH = –800 mV, VIL = –1800 mV –25
+25
uA
Data, clock input capacitance In multilayer ceramic package
0.5
pF
Maximum absolute output level Note 5
+1
V
Minimum absolute output level Note 5
–1.5
V
(Continued on next page)
2
For additional information and latest specifications, see our website: www.triquint.com

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