SA25F020LMLX Просмотр технического описания (PDF) - Saifun Semiconductors

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SA25F020LMLX

2Mb Serial Flash with 25MHz SPI Bus Interface

Saifun Semiconductors 

SA25F020 Advanced Information

SAIFUN

5

Memory Organization

The memory is organized in the following

manner:

•= 262,144 bytes (8 bits each)

•= 4 sectors (512 Kb, 65,536 bytes

each), as shown in Table 1

Each page can be individually

programmed, with the bits programmed

from 1 to 0. The SA25F020's memory can

be erased via the Page, Sector or Bulk

Erase commands, with the bits erased

from 0 to 1.

•= 1024 pages (256 bytes each)

Table 1. Memory Organization

Sector

Address Range

3

30000h

3FFFFh

2

20000h

2FFFFh

1

10000h

1FFFFh

0

00000h

0FFFFh

SRAM

PS

Logic

Array - L

X

D

E

Array - R

C

RD

DATA PATH

IO

Figure 1. SA25F020 Block Diagram

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