MX29F1610MC-15 Просмотр технического описания (PDF) - Macronix International

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MX29F1610MC-15

16M-BIT [2M x 8/1M x 16] CMOS SINGLE VOLTAGE FLASH EEPROM

Macronix International 

MX29F1610

Table1.PIN DESCRIPTIONS

SYMBOL TYPE

A0 - A19 INPUT

Q0 - Q7 INPUT/OUTPUT

Q8 - Q14 INPUT/OUTPUT

Q15/A -1 INPUT/OUTPUT

CE1/CE2 INPUT

PWD

INPUT

OE

WE

RY/BY

INPUT

INPUT

OPEN DRAIN OUTPUT

NAME AND FUNCTION

ADDRESS INPUTS: for memory addresses. Addresses are internally

latched during a write cycle.

LOW-BYTE DATA BUS: Input data and commands during Command

Interface Register(CIR) write cycles. Outputs array,status and identifier

data in the appropriate read mode. Floated when the chip is de-selected

or the outputs are disabled.

HIGH-BYTE DATA BUS: Inputs data during x 16 Data-Write operations.

Outputs array, identifier data in the appropriate read mode; not used for

status register reads. Floated when the chip is de-selected or the

outputs are disabled.

Selects between high-byte data INPUT/OUTPUT(BYTE = HIGH) and

LSB ADDRESS(BYTE = LOW)

CHIP ENABLE INPUTS: Activate the device's control logic, Input buffers,

decoders and sense amplifiers. With either CE1 or CE2 high, the device

is de-selected and power consumption reduces to Standby level upon

completion of any current program or erase operations. Both CE1,CE2

must be low to select the device. CE2 is not provided in 44-pin SOP

package.

All timing specifications are the same for both signals. Device selection

occurs with the latter falling edge of CE1 or CE2. The first rising edge

of CE1 or CE2 disables the device.

POWER-DOWN: Puts the device in deep power-down mode. PWD is

active low; PWD high gates normal operation. PWD also locks out erase

or program operation when active low providing data protection during

power transitions.

OUTPUT ENABLES: Gates the device's data through the output buffers

during a read cycle OE is active low.

WRITE ENABLE: Controls writes to the Command Interface

Register(CIR). WE is active low.

READY/BUSY: Indicates the status of the internal Write State

Machine(WSM). When low it indicates that the WSM is performing a

erase or program operation. RY/BY high indicate that the WSM is ready

for new commands, sector erase is suspended or the device is in deep

power-down mode. RY/BY is always active and does not float to tristate

off when the chip is deselected or data output are

disabled.

P/N:PM0260

4

This Material Copyrighted by Its Respective Manufacturer

REV. 2.3, APR. 16, 1999

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