ADG774 Просмотр технического описания (PDF) - Analog Devices
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ADG774 Datasheet PDF : 12 Pages
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PIN CONFIGURATION
(SOIC/QSOP)
IN 1
S1A 2
16 VDD
15 EN
S1B 3
14 S4A
D1 4 ADG774 13 S4B
TOP VIEW
S2A 5 (Not to Scale) 12 D4
S2B 6
11 S3A
D2 7
10 S3B
GND 8
9 D3
ADG774
VDD
GND
S
D
IN
EN
RON
⌬RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
tOFF
tD
Crosstalk
Off Isolation
Bandwidth
Distortion
TERMINOLOGY
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Logic Control Input.
Ohmic Resistance between D and S.
On Resistance Match between any Two Channels, i.e., RON max – RON min.
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over
the specified analog signal range.
Source Leakage Current with the Switch OFF.
Drain Leakage Current with the Switch OFF.
Channel Leakage Current with the Switch ON.
Analog Voltage on Terminals D, S.
OFF Switch Source Capacitance.
OFF Switch Drain Capacitance.
ON Switch Capacitance.
Delay between Applying the Digital Control Input and the Output Switching on. See Test Circuit 4.
Delay between Applying the Digital Control Input and the Output Switching Off.
OFF Time or ON Time Measured between the 90% Points of Both Switches, When Switching from One Address
State to Another. See Test Circuit 5.
A Measure of Unwanted Signal that is Coupled through from One Channel to Another as a Result of Parasitic
Capacitance.
A Measure of Unwanted Signal Coupling through an OFF Switch.
Frequency Response of the Switch in the ON State Measured at 3 dB Down.
RFLAT(ON)/RL
REV. C
–5–
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