PE9601 Просмотр технического описания (PDF) - Peregrine Semiconductor
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PE9601 Datasheet PDF : 15 Pages
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PE9601
Product Specification
Functional Description
The PE9601 consists of a prescaler, counters, a
phase detector, a charge pump and control logic.
The dual modulus prescaler divides the VCO
frequency by either 10 or 11, depending on the
value of the modulus select. Counters “R” and “M”
divide the reference and prescaler output,
respectively, by integer values stored in a 20-bit
register. An additional counter (“A”) is used in the
Figure 4. Functional Block Diagram
fr
R Counter
(6-bit)
modulus select logic. The phase-frequency detector
generates up and down frequency control signals,
which are implemented as a pulse width modulated
current by the charge pump. The control logic
includes a selectable chip interface. Data can be
written via serial bus, parallel bus, or hardwired
direct to the pins. There are also various
operational and test modes and lock detect.
fc
D(7:0)
Sdata
Control
Pins
Control
Logic
R(5:0)
M(8:0)
A(3:0)
Modulus
Select
Fin
10/11
Fin
Prescaler
M Counter
(9-bit)
Phase
Detector
PD_U
Charge
PD_D Pump
CP
LD
Cext
2 kΩ
fp
Copyright Peregrine Semiconductor Corp. 2001
Page 8 of 15
File No. 70/0025~02C | UTSi CMOS RFIC SOLUTIONS
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