25LC320A(2007) Просмотр технического описания (PDF) - Microchip Technology
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25LC320A Datasheet PDF : 26 Pages
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BLOCK DIAGRAM
STATUS
Register
25AA320A/25LC320A
HV Generator
I/O Control
Logic
Memory X
Control
Logic Dec
EEPROM
Array
Page Latches
SI
SO
CS
SCK
HOLD
WP
VCC
VSS
Y Decoder
Sense Amp.
R/W Control
TABLE 2-1: INSTRUCTION SET
Instruction Name Instruction Format
READ
WRITE
0000 0011
0000 0010
WRDI
WREN
RDSR
0000 0100
0000 0110
0000 0101
WRSR
0000 0001
Description
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read STATUS register
Write STATUS register
FIGURE 2-1: READ SEQUENCE
CS
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 11
21 22 23 24 25 26 27 28 29 30 31
Instruction
16-bit Address
0 0 0 0 0 0 1 1 15 14 13 12
210
High-Impedance
Data Out
76543210
© 2007 Microchip Technology Inc.
DS21828D-page 7
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