24AA515T-I(2003) Просмотр технического описания (PDF) - Microchip Technology

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24AA515T-I
(Rev.:2003)

512K I2C™ CMOS Serial EEPROM

Microchip Technology 

24AA515/24LC515/24FC515

8.0 READ OPERATION

Read operations are initiated in the same way as write

operations with the exception that the R/W bit of the

control byte is set to one. There are three basic types

of read operations: current address read, random read,

and sequential read.

8.1 Current Address Read

The 24XX515 contains an address counter that main-

tains the address of the last word accessed, internally

incremented by one. Therefore, if the previous read

access was to address n (n is any legal address), the

next current address read operation would access data

from address n + 1.

Upon receipt of the control byte with R/W bit set to one,

the 24XX515 issues an acknowledge and transmits the

8-bit data word. The master will not acknowledge the

transfer but does generate a Stop condition and the

24XX515 discontinues transmission (Figure 8-1).

FIGURE 8-1:

CURRENT ADDRESS

READ

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

S

T

A CONTROL

R

BYTE

T

S

1

0

1

0

BAA

010

1

A

C

K

S

DATA

T

BYTE

O

P

P

N

O

A

C

K

8.2 Random Read

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, first the word address must

be set. This is done by sending the word address to the

24XX515 as part of a write operation (R/W bit set to 0).

After the word address is sent, the master generates a

Start condition following the acknowledge. This termi-

nates the write operation, but not before the internal

address pointer is set. Then, the master issues the

control byte again but with the R/W bit set to a one. The

24XX515 will then issue an acknowledge and transmit

the 8-bit data word. The master will not acknowledge

the transfer but does generate a Stop condition which

causes the 24XX515 to discontinue transmission

(Figure 8-2). After a random Read command, the inter-

nal address counter will point to the address location

following the one that was just read.

8.3 Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the 24XX515 transmits

the first data byte, the master issues an acknowledge

as opposed to the Stop condition used in a random

read. This acknowledge directs the 24XX515 to trans-

mit the next sequentially addressed 8-bit word

(Figure 8-3). Following the final byte transmitted to the

master, the master will NOT generate an acknowledge

but will generate a Stop condition. To provide sequen-

tial reads, the 24XX515 contains an internal address

pointer which is incremented by one at the completion

of each operation. This address pointer allows half the

memory contents to be serially read during one opera-

tion. Sequential read address boundaries are 0000h to

7FFFh and 8000h to FFFFh. The internal address

pointer will automatically roll over from address 7FFF to

address 0000 if the master acknowledges the byte

received from the array address 7FFF. The internal

address counter will automatically roll over from

address FFFFh to address 8000h if the master

acknowledges the byte received from the array

address FFFFh.

 2003 Microchip Technology Inc.

Preliminary

DS21673C-page 11

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