LB1869M Просмотр технического описания (PDF) - SANYO -> Panasonic

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LB1869M

Two-Phase Unipolar Brushless Motor Driver Automatic Recovery Type Circuit in a Miniature Flat Package

SANYO -> Panasonic 

LB1863M, 1869M

Sample Application Circuit Output Waveforms

Truth Table

IN+

IN–

C

H

L

L

L

H

L

H

L

H

L

H

H

OUT1 OUT2 RD

H

L

L

L

H

L

H

H

H

H

H

H

Design Documentation (See the application circuit diagram.)

1. Power-supply voltage (VIN pin)

Since these miniature flat package products supply power to the Hall amplifier block and the control block from an

internal parallel regulator, they operate with good stability with respect to kickback currents from the motor and

variations in the power-supply voltage. They also provide an adequate ability to withstand surges. The resistor R1

between the VCC and VIN pins should be set up so that a current in the range ICC = 6 to 50 mA flows into the VIN pin

in the fan motor power-supply voltage range.

VIN has a typical value of 6.7 volts when ICC is 7 mA. The current flowing into VIN can be calculated with the

following formula.

ICC = —V—CCR—–1—VI—N ......................(1)

• Abnormal voltage considerations

The maximum allowable current for the VIN pin is 200 mA. Therefore, the IC design allows it to withstand voltages

up to the plus side abnormal voltage Vsurge give by formula (2).

Vsurge = VIN + R1 × 200 mA......(2)

2. Hall input pin voltages (IN– and IN+ pins)

The Hall element output voltages to the Hall element input pins must be in the range 0 to (VIN –1.5 V). The gain from

the Hall input pins to the output pin is over 100 dB. The Hall input amplifier offset voltage is ±7 mV. This means that

the Hall element output must be set up taking this ±7 mV offset into account.

3. Output transistors (OUT1 and OUT2 pins)

Output current: IO = 1.5 A maximum

Output saturation voltage: VOsat = 1.15V/1.0 A (typical)

Applications should adopt one of the following three output protection techniques.

Œ If a capacitor is inserted between OUT and ground, use a capacitor with a value up to C = 10 µF, and design that

value so that the kickback and reverse voltages do not exceed VOR.

 If a Zener diode is added, determine a value for the Zener voltage that is lower than VO(SUS). If radio-frequency

noise is a problem, insert a capacitor between B1 and B2.

Ž If a capacitor is inserted between OUT and B1, set the capacitor value so that the kickback voltage is lower than

VO(SUS). If oscillation occurs, insert a resistor in series with the capacitor.

No. 4943-4/5

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