LA4550 Просмотр технического описания (PDF) - SANYO -> Panasonic

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LA4550

Monolithic Linear IC

SANYO -> Panasonic 

LA4550

Continued from preceding page.

C7 (C8) : Output capacitor. The low cutoff frequency is determined by the following formula.

fL=

1

2πC7RL

fL : Low cutoff frequency

RL : Load resistance

To make the low frequency response in the bridge amplifier mode identical with that in the stereo mode, the

capacitor value must be doubled.

C9 :

Decoupling capacitor. Used for the ripple filter. Since the rejection effect is saturated the capacitor value more

than needed. This capacitor, being also used for the time constant of the muting circuit, affects the starting

time.

C10 : Power source capacitor.

Application Circuits

Voltage gain adjust

· Stereo mode

The voltage gain is determined by on-chip resistor R1 (R2) and external feedback resistor Rf as follows :

VG=20 log

R1

Rf1+R2

[dB]

Any voltage gain can be obtained by external

resistor Rf.

· [BTL 1]

Bridge amplifier 1 mode

Vo1≈

R1

R2+R4+Rf1+Rf2

Vi

Vo2≈ –

R3

R2+R4+Rf1+Rf2

Vi

Vo = Vo1 – Vo2

=

R1+R3

Vi

R2+R4+Rf1+Rf2

∴VG=20 log

Vo

Vi

=20log

R1+R3

R2+R4+Rf1+Rf2

[dB]

Assuming R2=R4=50Ω, R1=R3=20kΩ and Rf1=Rf2, the voltage gain is obtained by :

VG=20 log

R1

Rf1+R2

[dB]

[BTL 2]

Bridge amplifier 2 mode

The CH1 is a noninverting amplifer and the CH2 is an inverting amplifier. The total voltage gain, being apparently

higher than that of the CH1 by 6dB, is approximately calculated by the following formula.

VG=20log R2/R1+6 (dB)

To reduce the voltage gain, Rf is connected and the following formula is used.

VG=20log R2/Rf+R1+6 (dB)

No.1718–4/9

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