100311 Просмотр технического описания (PDF) - Fairchild Semiconductor
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100311 Datasheet PDF : 6 Pages
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Industrial Version (Continued)
DC Electrical Characteristics (Note 9)
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
TC = −40°C
Min
Max
TC = 0°C to +85°C
Min
Max
Units
Conditions
VIL
Input LOW Voltage
−1830 −1480 −1830 −1475
mV Guaranteed LOW Signal for
All Inputs
IIL
Input LOW Current
IIH
Input HIGH Current
CLKIN, CLKIN
0.50
0.50
100
100
µA VIN = VIL (Min)
VIN = VIH (Max)
µA
EN
250
250
ICBO
Input Leakage Current
−10
−10
µA
VIN = VEE
IEE
Power Supply Current
−115
−57
−115
−57
mA Inputs Open
VPP
Minimum Input Swing
150
150
mV
VCMR
Common Mode Range
VCC−2.0 VCC−0.5 VCC−2.0 VCC−0.5
V
Note 9: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
TC = −40°C
Min Typ Max
TC = +25°C
Min Typ Max
TC = +85°C
Units
Min Typ Max
Conditions
fMAX
tPLH
tPHL
Max Toggle Frequency
CLKIN to Qn
Propagation Delay,
CLKINn to CLKn
Differential
750
750
750
MHz (Note 10)
0.72 0.81 0.92 0.77 0.86 0.95 0.84 0.93 1.04 ns Figure 3
Single-Ended
0.62 0.89 1.02 0.67 0.93 1.17 0.74 1.06 1.24
tPLH
Propagation Delay
0.70 0.97 1.20 0.80 1.05 1.25 0.85 1.12 1.35 ns Figure 2
tPHL
SEL to Output
tPS
LH–HL Skew
10 30
10 30
10 30
(Note 11)(Note 14)
tOSLH
Gate–Gate Skew LH
20 50
20 50
20
50
ps (Note 12)(Note 14)
tOSHL
Gate–Gate Skew HL
20 50
20 50
20 50
(Note 12)(Note 14)
tOST
Gate–Gate LH–HL Skew
30 60
30 60
30 60
(Note 13)(Note 14)
tS
Setup Time
250
250
300
ps
ENn to CLKINn
tH
Hold Time
0
0
0
ps
ENn to CLKINn
tR
Release Time
300
300
300
ps
ENn to CLKINn
tTLH
Transition Time
275 500 750 275 480 750 275 460 750 ps Figure 4
tTHL
20% to 80%, 80% to 20%
Note 10: fMAX = the highest frequency of which output VOL/VOH levels still meet VIN specifications. The F311 will function @ 1 GHz
Note 11: tPS describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair's LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 12: tOSLH describes in-phase gate differential propagation skews with all differential outputs going LOW-to-HIGH; tOSHL describes the same conditions
except with the outputs going HIGH-to-LOW.
Note 13: tOST describes the maximum worst case difference in any of the tPS, tOSLH or tOST delay paths combined.
Note 14: The skew specifications pertain to differential I/O paths.
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