HIP0045 Просмотр технического описания (PDF) - Intersil
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HIP0045 Datasheet PDF : 10 Pages
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Detailed Block Diagram
HIP0045
VCC
IN 0, 1
Q0, 1
ON/OFF
LATCH
FILTER
FAULT LATCH
SQ
R
DIAG 0, 1
STATUS/
FAULT
OVERLOAD LATCH
SQ
R
RESET
DRIVER
-
+
OC
REF
ISK OUT0, 1
VCC
+ VREF
-
VCC
CE
MISO
RESET
QD
SCK
VCC
FILTER
Q0-7
OUT
8-BIT
OUTPUT
LATCH
Q2 - 5
ON/OFF
LATCH
OVERLOAD LATCH
SQ
R
MOSI
VCC
VCC
RESET
LOW
VOTAGE
RESET
SPI
SHIFT
REG
IN
DIAG 0-7
RESET
NOTES:
1. OC = Over-Current Voltage Ref. = 1.8V Typ.
2. ISK = Current Sink Pull-Down = 500µA Typ.
3. Diag0, 1 = Status bit when Q0, 1 controlling OUT0, 1.
4. Diag0, 1 = Fault bit when IN1, 0 controlling OUT0, 1.
5. Refer to text and Tables 6, 7 for diagnostic information.
Q6, 7
ON/OFF
LATCH
OVERLOAD LATCH
SQ
R
OVER-TEMP.
DET.
DRIVER
ISK OUT2-5
-
+
OC
REF
DIAG 2 - 5
+
-
STATUS
VCC
VREF
DRIVER
ISK OUT6, 7
-
+
OC
REF
DIAG6, 7
+
-
STATUS
VCC
VREF
Input to Output Control Tables
TABLE 1. OUTPUT 0
SPI BIT 0
IN0
0
1
0
0
1
0
1
1
SPI BIT 1
0
0
1
1
TABLE 2. OUTPUT 1
IN1
1
0
0
1
OUT0
OFF
ON
ON
ON
OUT1
OFF
ON
ON
ON
TABLE 3. OUTPUT 2 - 7
SPI BIT 2 - 7
OUT2 - 7
0
OFF
1
ON
TABLE 4. OUTPUT CONTROL REGISTER, Q0 - 7
Q1 Q3 Q5 Q7 Q0 Q2 Q4 Q6
(D7I) (D6I) (D5I) (D4I) (D3I) (D2I) (D1I) (D0I)
MSB
LSB
NOTE: The Output Control Register bits Q0 -7 have the same order
as the Diagnostic Failure Register bits Diag0 - 7 as defined in Table 5.
Data bits D0I - D7I give the MOSI SPI serial data input flow
sequence.
4-2
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