MMA7455L(2007) Просмотр технического описания (PDF) - Freescale Semiconductor

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производитель

MMA7455L
(Rev.:2007)

±2g/±4g/±8g Three Axis Low-g Digital Output Accelerometer

Freescale Semiconductor 

MULTIPLE BYTES WRITE

The MMA7455L automatically increments the received

register address commands after a write command is

received. Therefore, after following the steps of a single byte

write, multiple bytes of data can be written to sequential

registers after each MMA7455L acknowledgment (ACK) is

received. See Figure 10.

Figure 10. Multiple Byte Writes - The Master (MCU) is writing to multiple sequential registers of the MMA7455L

SPI SLAVE INTERFACE

The MMA7455L also uses serial peripheral interface

communication as a digital communication. The SPI

communication is primarily used for synchronous serial

communication between a master device and one or more

slave devices. See Figure 16 for an example of how to

configure one master with two MMA7455L devices. The

MMA7455L is always operated as a slave device. Typically,

the master device would be a microcontroller which would

drive the clock (SPC) and chip select (CS) signals.

The SPI interface consists of two control lines and two data

lines: CS, SPC, SDI, and SDO. The CS, also known as Chip

Select, is the slave device enable which is controlled by the

SPI master. CS is driven low at the start of a transmission. CS

is then driven high at the end of a transmission. SPC is the

Serial Port Clock which is also controlled by the SPI master.

SDI and SDO are the Serial Port Data Input and the Serial

Port Data Output. The SDI and SDO data lines are driven at

the falling edge of the SPC and should be captured at the

rising edge of the SPC.

Read and write register commands are completed in 16

clock pulses or in multiples of 8, in the case of a multiple byte

read/write.

SPI READ OPERATION

A SPI read transfer consists of a 1-bit Read/Write signal, a

6-bit address, and 1-bit don’t care bit. (1-bit R/W=0 + 6-bits

address + 1-bit don’t care). The data to read is sent by the

SPI interface during the next transfer. See Figure 11 and

Figure 12 for the timing diagram for an 8-bit read in 4 wire and

3 wire modes, respectively.

SPI WRITE OPERATION

In order to write to one of the 8-bit registers, an 8-bit write

command must be sent to the MMA7455L. The write

command consists of an MSB (0=read, 1=write) to indicate

writing to the MMA7455L register, followed by a 6-bit address

and 1 don’t care bit.

The command should then be followed the 8-bit data

transfer. See Figure 13 for the timing diagram for an 8-bit

data write.

Figure 11. SPI Timing Diagram for 8-Bit Register Read (4 Wire Mode)

Figure 12. SPI Timing Diagram for 8-Bit Register Read (3 Wire Mode)

Figure 13. SPI Timing Diagram for 8-Bit Register Write (3 Wire Mode)

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MMA7455L

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