MFRC52202HN1 Просмотр технического описания (PDF) - NXP Semiconductors.
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MFRC52202HN1 Datasheet PDF : 95 Pages
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NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
Table 3.
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin description …continued
Symbol
Type[1] Description
VMID
P
internal reference voltage
RX
I
RF signal input
AVSS
G
analog ground
AUX1
O
auxiliary outputs for test purposes
AUX2
O
auxiliary outputs for test purposes
OSCIN
I
OSCOUT O
crystal oscillator inverting amplifier input; also the input for an externally generated clock
(fclk = 27.12 MHz)
crystal oscillator inverting amplifier output
IRQ
O
interrupt request output: indicates an interrupt event
SDA
I/O
I2C-bus serial data line input/output[2]
NSS
I
SPI signal input[2]
RX
I
UART address input[2]
D1
I/O
test port[2]
ADR_5
I/O
I2C-bus address 5 input[2]
D2
I/O
test port
ADR_4
I
I2C-bus address 4 input[2]
D3
I/O
test port
ADR_3
I
I2C-bus address 3 input[2]
D4
I/O
test port
ADR_2
I
I2C-bus address 2 input[2]
D5
I/O
test port
ADR_1
I
I2C-bus address 1 input[2]
SCK
I
SPI serial clock input[2]
DTRQ
O
UART request to send output to microcontroller[2]
D6
I/O
test port
ADR_0
I
I2C-bus address 0 input[2]
MOSI
I/O
SPI master out, slave in[2]
MX
O
UART output to microcontroller[2]
D7
I/O
test port
SCL
I/O
I2C-bus clock input/output[2]
MISO
I/O
SPI master in, slave out[2]
TX
O
UART data output to microcontroller[2]
EA
I
external address input for coding I2C-bus address[2]
[1] Pin types: I = Input, O = Output, I/O = Input/Output, P = Power and G = Ground.
[2] The pin functionality of these pins is explained in Section 8.1 “Digital interfaces”.
[3] Connection of heatsink pad on package bottom side is not necessary. Optional connection to pin DVSS is possible.
MFRC522
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.9 — 27 April 2016
112139
© NXP Semiconductors N.V. 2016. All rights reserved.
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