EVAL-SDP-CB1Z(RevE) Просмотр технического описания (PDF) - Analog Devices
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EVAL-SDP-CB1Z Datasheet PDF : 26 Pages
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AD7687
Data Sheet
TIMING SPECIFICATIONS
−40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated.
See Figure 2 and Figure 3 for load conditions.
Table 4.
Parameter
CONVERSION TIME: CNV RISING EDGE TO DATA AVAILABLE
ACQUISITION TIME
TIME BETWEEN CONVERSIONS
CNV PULSE WIDTH (CS MODE)
SCK PERIOD
CS Mode
Chain Mode
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
SCK TIME
Low
High
SCK FALLING EDGE
To Data Remains Valid
To Data Valid Delay
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
CNV OR SDI
Low to SDO D15 MSB Valid (CS Mode)
VIO Above 4.5 V
VIO Above 2.7 V
VIO Above 2.3 V
High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI
Valid Setup Time from CNV Rising Edge (CS Mode)
Valid Hold Time from CNV Rising Edge (CS Mode)
Valid Setup Time from SCK Falling Edge (Chain Mode)
Valid Hold Time from SCK Falling Edge (Chain Mode)
High to SDO High (Chain Mode with BUSY indicator)
VIO Above 4.5 V
VIO Above 2.3 V
SCK
Valid Setup Time from CNV Rising Edge (Chain Mode)
Valid Hold Time from CNV Rising Edge (Chain Mode)
Symbol
tCONV
tACQ
tCYC
tCNVH
tSCK
Min Typ Max Unit
0.5
2.2 µs
1.8
µs
4
µs
10
ns
15
ns
17
ns
18
ns
19
ns
20
ns
tSCKL
7
tSCKH
7
tHSDO
5
tDSDO
ns
ns
14
ns
15
ns
16
ns
17
ns
tEN
15
ns
18
ns
22
ns
tDIS
25
ns
tSSDICNV
15
tHSDICNV
0
tSSDISCK
3
tHSDISCK
4
tDSDOSDI
ns
ns
ns
ns
15
ns
26
ns
tSSCKCNV
5
ns
tHSCKCNV
5
ns
Rev. E | Page 6 of 26
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