HI1178JCQ Просмотр технического описания (PDF) - Intersil
Номер в каталоге
Компоненты Описание
производитель
HI1178JCQ Datasheet PDF : 11 Pages
| |||
Application Circuit
HI1178
AVDD
DVDD
0.1µ
R(RED)IN
48 47 46 45 44 43 42 41 40 39 38 37
(LSB) 1
36
2
35
3
34
4
33
5
32
6
7
(MSB)
8
(LSB) 9
10
HI1178
31
30
(BCK) 29
(GCK) 28
(RCK) 27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
B(BLUE)OUT
200
AVSS
G(GREEN)OUT
200
AVSS
R(RED)OUT
200
AVSS
2V
AVDD
1K
AVSS
0.1µ
3.3K
AVSS
DVSS
CLOCK IN
DVSS
G(GREEN)IN
B(BLUE)IN
FIGURE 11.
Notes On Operation
• How to select the output resistance
The HI1178 is a current-output D/A converter. To obtain
the output voltage, connect the resistance to IO pin (RO,
GO, BO). For specifications we have:
Output Full Scale Voltage
Output Full Scale Current
VFS = less than 2.0 [V]
IFS = less than 15 [mA]
Calculate the output resistance value from the relation of
VFS = IFS X R. Also, 16 times resistance of the output
resistance is connected to reference current pin IREF. In
some cases, however, this turns out to be a value that
does not actually exist. In such a case a value close to it
can be used as a substitute. Here please note that VFS
becomes VFS = VREF X 16R/R'. R is the resistance con-
nected to IO while R' is connected to IREF. Increasing the
resistance value can curb power consumption. On the
other hand glitch energy and data settling time will
inversely increase. Set the most suitable value according
to the desired application.
• Phase Relation Between Data and Clock
To obtain the expected performance as a D/A converter, it
is necessary to set properly the phase relation between
data and clock applied from the exterior. Be sure to satisfy
the provisions of the set up time (tS) and hold time (tH) as
stipulated in the Electrical Characteristics.
• VDD, VSS
To reduce noise effects separate analog and digital
systems in the device periphery. For VDD pins, both digital
and analog, bypass respective GNDs by using a ceramic
capacitor of 0.1µF, as close as possible to the pin.
10
Share Link: 