53C810 Просмотр технического описания (PDF) - Unspecified

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53C810

PCI-SCSI I/O Processor

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Chapter One

Introduction

PRELIMINARY

53C810

Benefits Summary

Ease of Use

Performance

• Supports variable block size and scatter/gather

data transfers.

• Supports 32-bit word data bursts with vari-

able burst lengths

Sustained memory-to-memory DMA transfers

in excess of 47 MB/s (@ 33 MHz)

• Zero wait-state bus master with burst transfers

in excess of 110 MB/s (@ 33 MHz)

• Minimizes SCSI I/O start latency

• Performs complex bus sequences without

interrupts, including restore data pointers

• Unique interrupt status reporting - reduces

ISR overhead

• High-speed async/sync single-ended SCSI bus

transfers

• 5 MB/s asynchronous

• 10 MB/s synchronous

• 64-byte DMA FIFO

Integration

• Full 32-bit PCI DMA bus master

• Optionally can be used as a third-party PCI

bus DMA controller by using the Memory to

Memory Move instructions.

'. High performance SCSI core

• Integrated SCRIPTS processor

• Direct PCI-to-SCSI connection '

• First "3-volt friendly" PCI device

• Reduces SCSI development effort

• Easily adapted to the SCSI Common Access

Method (CAM)

Compiler-compatible With existing 53 C71 0

and 53C720 SCRIPTS

• Direct connection to PCI and single-ended

SCSI buses.

• Development tools and SCSI SCRIPTS

available

• All interrupts are maskable and pollable

• Three programmable SCSI timers: Select!

Reselect, Handshake-to-Handshake, and

General Purpose. The time-out period is

programmable from 100 J.lS to greater than 1.6

seconds.

Fully supported by NCR SDMS software for

complex PC-based operating system support

Flexibility

High level programmer's interface (SCSI

SCRIPTS)

Allows tailored SCSI sequences to be ex-

ecuted from main memory

Flexible sequences to tune I/O performance

or to adapt to unique SCSI devices

Accommodates changes in the logical I/O

interface defmition

Low level programmability (register oriented)

Allows a target to disconnect and later rese-

lect with no interrupt to the system processor

1-2

NCR 53C810 Data Manual

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