V104 Просмотр технического описания (PDF) - Integrated Circuit Systems
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V104 Datasheet PDF : 11 Pages
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V104
10 BIT LVDS RECEIVER FOR VIDEO
AC Timing Diagrams
TTL
Outputs
80%
80%
20%
tTLH
TTL Output
CL = 8 pF
20%
tTHL
TTL Output Load
PRELIMINARY
TTL Outputs
CLK OUT
2.0 V
tRCP
Rxn
x = A, B, C, D, E
n = 0, 1, 2, 3, 4, 5, 6
tRCH
tRCL
2.0 V 2.0 V
0.8 V 0.8 V
R/F = L
R/F = H
tRS
tRH
2.0 V
0.8 V
2.0 V
0.8 V
Phase Lock Loop Set Time
VCC
RCLK+/-
3.0 V
2.0 V
PD
tRPLL
CLKOUT
2.0 V
V104 Datasheet
8
1/12/05
Revision 1.6
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
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