STE2002(2002) Просмотр технического описания (PDF) - STMicroelectronics
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STE2002 Datasheet PDF : 51 Pages
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STE2002
The STE2002 provides three bits (BS0, BS1, BS2) for programming the desired Bias Ratio as shown below:
BS2
BS1
BS0
n
0
0
0
7
0
0
1
6
0
1
0
5
0
1
1
4
1
0
0
3
1
0
1
2
1
1
0
1
1
1
1
0
The following table Bias Level for m = 65 and m = 81 are provided:
Symbol
m = 65 (1/9)
V1
VLCD
V2
8/9*VLCD
V3
7/9*VLCD
V4
2/9*V VLCD
V5
1/9 *VLCD
V6
VSS
m = 81 (1/10)
VLCD
9/10*VLCD
8/10*VLCD
2/10*VLCD
1/10*VLCD
VSS
LCD Voltage Generation
The LCD Voltage at reference temperature (To = 27°C) can be set using the VOP register content according to
the following formula:
VLCD(T=To) = VLCDo = (Ai+VOP · B) (i=0,1,2)
with the following values:
Symbol
Ao
A1
A2
B
To
Value
2.95
6.83
10.71
0.0303
27
Unit
Note
V
PRS = [0;0]
V
PRS = [0;1]
V
PRS = [1;0]
V
°C
Note that the three PRS values produce three adjacent ranges for VLCD. If the VOP register and PRS bits are
set to zero the internal voltage generator is switched off.
The proper value for the VLCD is a function of the Liquid Crystal Threshold Voltage (Vth) and of the Multiplexing
Rate. A general expression for this is:
VLCD
=
---------1-----+---------m------------
2
⋅
1
–
---1--m---
⋅
Vth
For MUX Rate m = 65 the ideal VLCD is:
VLCD(to) = 6.85 · Vth
than:
Vop = (---6---.--8---5----0-⋅--.-V-0---t3--h----–-----A----i-)-
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