SPHE8200A Просмотр технического описания (PDF) - Unspecified

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SPHE8200A

DVD Single Chip MPEG AV Processor

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Preliminary

SPHE8200A

100-110 : Available only at 256 pin package

111: Reserved

RISC_INT5_2 RISC INT bit 5 to bit 2 interrupt select (level, active low)

000: Disable (default)

001: INTRQ_N[2] is from pin 141,

l Y INTRQ_N[3] is from pin 143,

tia G INTRQ_N[4] is from pin 144,

INTRQ_N[5] is from pin 145

n O 010: INTRQ_N[2] is from pin 129,

e L INTRQ_N[3] is from pin 130,

fid O C INTRQ_N[4] is from pin 131,

n N IN INTRQ_N[5] is from pin 133

o H 011: INTRQ_N[2] is from pin 29,

E INTRQ_N[3] is from pin 31,

s C EC IS INTRQ_N[4] is from pin 34,

INTRQ_N[5] is from pin 35

lu T D Y 100-110: Available only at 256 pin package

np IC N L 111: Reserved

A RISC_INTEXT RISC INTEXT_N bit 5 to bit 0 interrupt select (level, active low)

u N N 000: Disable (default)

H O 001: INTRQ_N[0] is from pin 141,

S N C INTRQ_N[1] is from pin 143,

U R E INTRQ_N[2] is from pin 144,

S E S INTRQ_N[3] is from pin 145,

r U INTRQ_N[4] is from pin 146

o M INTRQ_N[5] is from pin 148

F & 010: INTRQ_N[0] is from pin 129,

INTRQ_N[1] is from pin 130,

INTRQ_N[2] is from pin 131,

INTRQ_N[3] is from pin 133,

INTRQ_N[4] is from pin 134,

INTRQ_N[5] is from pin 135

011: INTRQ_N[0] is from pin 29,

INTRQ_N[1] is from pin 31,

INTRQ_N[2] is from pin 34,

INTRQ_N[3] is from pin 35,

INTRQ_N[4] is from pin 37,

INTRQ_N[5] is from pin 38

© Sunplus Technology Co., Ltd.

36

Proprietary & Confidential

OCT. 07, 2003

Preliminary Version: 0.2

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