Silicon Image, Inc.
SiI 161A
Implementation Guidelines for Thermal Land Design:
SiI-DS-0009-D
As described above, a thermal land on the PCB may be incorporated on the PCB to improve the heat removal from
the package. An example of this is shown in Figure 11, which depicts the exposed heat pad and Figure 12, which
shows a TQFP Thermal Land Design on a PCB. The size of this thermal land can be smaller or larger than the
exposed pad on the package. A clearance of at least 0.25 mm should be designed on the PCB between the outer
edges of the thermal land and the inner edges of pad pattern for the leads to avoid any shorts.
7.5
7.5
Figure 11. Bottom View of Thermally Enhanced 100-pin TQFP Package
7.5
7.5
Figure 12. TQFP Thermal Land Design on PCB
Silicon Image, Inc.
18
Subject to Change without Notice